Lattice Semiconductor
Architecture
LatticeECP/EC Family Data Sheet
Figure 2-1. Simplified Block Diagram, LatticeEC Device (Top Level)
Programmable I/O Cell
(PIC) includes sysIO
Interface
sysMEM Embedded
Block RAM (EBR)
JTAG Port
sysCONFIG Programming
Port (includes dedicated
and dual use pins)
PFF (PFU without
RAM)
sysCLOCK PLL
Programmable
Functional Unit (PFU)
Figure 2-2. Simplified Block Diagram, LatticeECP-DSP Device (Top Level)
Programmable I/O Cell
(PIC) includes sysIO
Interface
sysMEM Embedded
Block RAM (EBR)
JTAG Port
sysCONFIG Programming
Port (includes dedicated
and dual use pins)
PFF (Fast PFU
without RAM/ROM)
sysDSP Block
sysCLOCK PLL
Programmable
Functional Unit (PFU)
2-2
LATTICE [ LATTICE SEMICONDUCTOR ]
