LTC4060
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
V
HTIH
V
HTC
V
HTCH
V
NDIS
I
NL
t
ACC
NTC Pin Hot Charge Initiation Hysteresis Voltage
NTC Pin Hot Charge Cutoff Threshold Voltage
NTC Pin Hot Charge Cutoff Hysteresis Voltage
NTC Pin Disable Threshold Voltage
NTC Pin Pull-Down Current
Timer Accuracy
The
●
indicates specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 5V, V
BAT
= 2.8V, GND = 0V unless otherwise specified. All
currents into the device pins are positive and all currents out of the device pins are negative. All voltages are referenced to GND
unless otherwise specified.
CONDITIONS
V
NTC
Increasing
V
NTC
Decreasing, 4.5V
≤
V
CC
≤
10V
V
NTC
Increasing
25
V
NTC
= 2.5V
R
PROG
= 698Ω, C
TIMER
= 1.2nF and
R
PROG
= 3480Ω, C
TIMER
= 470pF
V
DRIVE
= 4V
V
DRIVE
= 4V, Not Charging
I
ACP
= I
CHRG
= 10mA
Outputs Inactive, V
CHRG
= V
ACP
= V
CC
V
CC
= 10V
–2
350
50
V
CC
= 10V, V
IN
= V
CC
V
IN
= GND
0.4
–2
2
–0.4
●
●
●
MIN
0.37 •
V
CC
TYP
100
0.4 •
V
CC
100
MAX
0.43 •
V
CC
250
1.5
UNITS
mV
V
mV
mV
µA
%
0.15
–15
0
15
Output Drivers
I
DRV
R
DRV
V
OL
I
OH
V
IT
V
ITH
I
IPD
I
IPU
Drive Pin Sink Current
Drive Pin Resistance to V
CC
ACP, CHRG Output Pins Low Voltage
ACP, CHRG Output Pins High Leakage Current
SHDN, SEL0, SEL1, CHEM, PAUSE Pins Digital
Input Threshold Voltage
SHDN, SEL0, SEL1, CHEM, PAUSE Pins Digital
Input Hysteresis Voltage
SHDN, SEL0, SEL1, CHEM Pins Digital Input
Pull-Down Current
PAUSE Pin Digital Input Pull-Up Current
40
70
4700
0.8
2
650
120
mA
Ω
V
µA
mV
mV
µA
µA
Control Inputs
Note 1:
Absolute Maximum Ratings only indicate limits for survivability.
Operating the device beyond these limits may result in permanent damage.
Continuous or extended application of these maximum levels may
adversely affect device reliability.
Note 2:
The LTC4060 is guaranteed to meet performance specifications
from 0°C to 70°C ambient temperature range and 0°C to 85°C junction
temperature range. Specifications over the –40°C to 85°C operating
ambient temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3:
This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Overtempera-
ture protection is activated at a temperature of approximately 145°C,
which is above the specified maximum operating junction temperature.
Continuous operation above the specified maximum operation temperature
may result in device degradation or failure. Operating junction temperature
T
J
(in
°C)
is calculated from the ambient temperature T
A
and the average
power dissipation P
D
(in watts) by the formula:
T
J
= T
A
+
θ
JA
• P
D
Note 4:
Short duration drops below the minimum V
CC
specification of
several microseconds or less are ignored by the undervoltage detection
circuit.
Note 5:
Assumes that the external PNP pass transistor has negligible B-C
reverse leakage current when the collector is biased at 2.8V (V
BAT
for two
charged cells in series) and the base is biased at V
CC
.
Note 6:
Assumes that the external PNP pass transistor has negligible B-E
reverse leakage current when the emitter is biased at 0V (V
CC
) and the
base is biased at 5.6V (V
BAT
for four charged cells in series).
Note 7:
The charge current specified is the regulated current through the
internal current sense resistor that flows into the external PNP pass
transistor’s emitter. Actual battery charging current is slightly less and
depends upon PNP alpha.
Note 8:
Given as a per cell voltage (V
BAT
/Number of Cells).
Note 9:
Supply current includes the current programming resistor current
of 2mA. The charger is paused and not charging the battery.
Note 10:
The minimum V
CC
supply is set at 5V during this test to
compensate for voltage drops due to test socket contact resistance and 2A
of current. This ensures that the supply voltage delivered to the device
under test does not fall below the UVLO entry threshold. Specification at
the minimum V
CC
of 4.5V is assured by design and characterization.
4060f
4
LINEAR [ LINEAR INTEGRATED SYSTEMS ]
