LT3507
APPLICATIONS INFORMATION
STEP-DOWN CONSIDERATIONS
1
DCMAX
=
1
B
1+
FB Resistor Network
The output voltage is programmed with a resistor divider
(refer to the Block Diagram) between the output and the
FB pin. Choose the resistors according to:
whereBistheoutputcurrentcapacitydividedbythetypical
boostcurrentfromtheBOOSTpincurrentvsswitchcurrent
in the Typical Performance Characteristics section.
VOUT
⎛
⎞
The maximum operating voltage without pulse-skipping
R1=R2
–1
⎜
⎝
⎟
⎠
800mV
is determined by the minimum duty cycle DC
:
MIN
VOUT + V
DCMIN
The parallel combination of R1 and R2 should be 10k or
less to avoid bias current errors.
F
V
=
– V + VSW
F
IN(PS)
Input Voltage Range
with DC
= t
• f
.
MIN
ON(MIN) SW
The minimum operating voltage is determined either by
Thus both the maximum and minimum input voltages are
a function of the switching frequency and output voltages.
Therefore the maximum switching frequency must be set
to a value that accommodates all the input and output
voltage parameters and must meet both of the following
criteria for each channel:
theLT3507’sinternalundervoltagelockout(4VonV ,3V
IN1
on V and V ) or by its maximum duty cycle. The duty
IN2
IN3
cycle is the fraction of time that the internal switch is on
and is determined by the input and output voltages:
VOUT + V
F
DC =
⎛
⎞
V – VSW + V
VOUT + V
IN(PS) – VSW + V
1
IN
F
F
fMAX1
=
•
⎜
⎟
V
tON(MIN)
⎝
⎠
F
where V is the forward voltage drop of the catch diode
F
(~0.4V) and V is the voltage drop of the internal switch
⎛
⎞
SW
VOUT + V
IN(MIN) – VSW + V
1
F
fMAX2 = 1–
•
(~0.3V at maximum load). This leads to a minimum input
⎜
⎟
V
tOFF(MIN)
⎝
⎠
F
voltage of:
VOUT + V
DCMAX
F
The values of t
and t
are functions of I
V
=
– V + VSW
F
ON(MIN)
OFF(MIN) SW
IN(MIN)
and temperature (see chart in the Typical Performance
Characteristics section). Worst-case values for switch
Thedutycycleisthefractionoftimethattheinternalswitch
is on during a clock cycle. The maximum duty cycle is
currents greater than 0.5A are t
= 130ns (for T >
ON(MIN)
= 170ns.
OFF(MIN)
J
125°C t
= 155ns) and t
ON(MIN)
generally given by DC
= 1– t
• f . However,
MAX
OFF(MIN) SW
f
is the frequency at which the minimum duty cycle
unlikemostfixedfrequencyregulators,theLT3507willnot
switchoffattheendofeachclockcycleifthereissufficient
voltage across the boost capacitor (C3 in Figure 1) to fully
saturatetheoutputswitch.Forcedswitchoffforaminimum
time will only occur at the end of a clock cycle when the
boost capacitor needs to be recharged. This operation
has the same effect as lowering the clock frequency for a
fixed off time, resulting in a higher duty cycle and lower
minimum input voltage. The resultant duty cycle depends
on the charging times of the boost capacitor and can be
approximated by the following equation:
MAX1
is exceeded. The regulator will skip ON pulses in order to
reduce the overall duty cycle at frequencies above f
.
MAX1
It will continue to regulate but with increased inductor
current and greatly increased output ripple. The increased
peak inductor current in pulse-skipping will also stress
the switch transistor at high voltages and high switch-
ing frequency. If the LT3507 is allowed to pulse-skip and
the input voltage is greater than 20V, then the switching
frequency must be kept below 1.1MHz to prevent damage
to the LT3507.
3507fa
10
Linear Systems [ Linear Systems ]
