LTC1411
Single Supply
14-Bit 2.5Msps ADC
FEATURES
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DESCRIPTIO
Sample Rate: 2.5Msps
80dB S/(N + D) and 90dB THD at 100kHz f
IN
Single 5V Operation
No Pipeline Delay
Programmable Input Ranges
Low Power Dissipation: 195mW (Typ)
True Differential Inputs Reject Common Mode Noise
Out-of-Range Indicator
Internal or External Reference
Sleep (1µA) and Nap (2mA) Shutdown Modes
36-Pin SSOP Package
The LTC
®
1411 is a 2.5Msps sampling 14-bit A/D con-
verter in a 36-pin SSOP package, which typically dissi-
pates only 195mW from a single 5V supply. This device
comes complete with a high bandwidth sample-and-
hold, a precision reference, programmable input ranges
and an internally trimmed clock. The ADC can be powered
down with either the Nap or Sleep mode for low power
applications.
The LTC1411 converts either differential or single-ended
inputs and presents data in 2’s complement format.
Maximum DC specs include
±2LSB
INL and 14-bit no
missing code over temperature. Outstanding dynamic
performance includes 80dB S/(N + D) and 90dB THD at
100kHz input frequency.
The LTC1411 has four programmable input ranges se-
lected by two digital input pins, PGA0 and PGA1. This
provides input spans of
±1.8V, ±1.27V, ±0.9V
and
±0.64V.
An out-of-the-range signal together with the D13 (MSB)
will indicate whether a signal is over or under the ADC’s
input range. A simple conversion start input and a data
ready signal ease connections to FIFOs, DSPs and micro-
processors.
APPLICATIO S
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Telecommunications
High Speed Data Acquisition
Digital Signal Processing
Multiplexed Data Acquisition Systems
Spectrum Analysis
Imaging Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
BLOCK DIAGRA
1
2
A
IN
+
10
AVP
30
DVP
OV
DD
29
86
80
74
68
62
56
50
44
38
32
26
20
14
10
A
IN–
REFOUT
REFIN
5k
5k
2k
INTERNAL
CLOCK
2.5V
BANDGAP
REFERENCE
OGND 28
D13
3
4
+
–
12
14-BIT
ADC
14
OUTPUT
DRIVERS
D0
BUSY
OTR
25
27
26
5
REFCOM1
REFCOM2
6
X1.62/
X1.15
CONTROL LOGIC
S/(N + D) (dB)
•
•
•
7, 8, 9
AGND
11
AVM
36
SLP
35
NAP
34
PGA0
33
PGA1
32
CONVST
31
DGND
1411 BD
U
S/(N + D) and Effective Bits
vs Input Frequency
14
13
12
11
10
W
U
EFFECTIVE BITS
100
1000
INPUT FREQUENCY (kHz)
10000
1411 TA02
1411f
1
LINEAR [ LINEAR INTEGRATED SYSTEMS ]
