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LTC2871 参数 Datasheet PDF下载

LTC2871图片预览
型号: LTC2871
PDF下载: 下载PDF文件 查看货源
内容描述: RS232 / RS485双多协议收发器,集成终端 [RS232/RS485 Dual Multiprotocol Transceiver with Integrated Termination]
分类和应用:
文件页数/大小: 28 页 / 441 K
品牌: LINEAR [ LINEAR INTEGRATED SYSTEMS ]
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LTC2872
pin FuncTions
DXEN1 (Pin 10):
Drivers #1 Enable. A logic low disables the
RS232 and RS485 drivers in transceiver #1, leaving their
outputs in a Hi-Z state. A logic high enables the RS232 or
RS485 drivers in transceiver #1, depending on the state
of the Interface Select Input 485/232_1.
DXEN2 (Pin 22):
Drivers #2 Enable. A logic low disables the
RS232 and RS485 drivers in transceiver #2, leaving their
outputs in a Hi-Z state. A logic high enables the RS232 or
RS485 drivers in transceiver #2, depending on the state
of the Interface Select Input 485/232_2.
TE485_1 (Pin 11):
RS485 Termination Enable for Trans-
ceiver #1. A logic high enables a 120Ω resistor between
pins A1 and B1. If DZ1 is also high, a 120Ω resistor is
enabled between pins Y1 and Z1. A logic low on TE485_1
opens the resistors, leaving A1/B1 and Y1/Z1 unterminated,
independent of DZ1. The differential termination resistors
are never enabled in RS232 mode.
TE485_2 (Pin 12):
RS485 Termination Enable for Trans-
ceiver #2. A logic high enables a 120Ω resistor between
pins A2 and B2. If DZ2 is also high, a 120Ω resistor is
enabled between pins Y2 and Z2. A logic low on TE485_2
opens the resistors, leaving A2/B2 and Y2/Z2 unterminated,
independent of DZ2. The differential termination resistors
are never enabled in RS232 mode.
H/F (Pin 15):
RS485 Half-duplex Select Input for Trans-
ceivers #1 and #2. A logic low is used for full duplex
operation where pins A and B are the receiver inputs and
pins Y and Z are the driver outputs. A logic high is used
for half duplex operation where pins Y and Z are both the
receiver inputs and driver outputs and pins A and B do
not serve as the receiver inputs. The impedance on A and
B and state of differential termination between A and B is
independent of the state of H/F. The H/F pin has no effect
on RS232 operation.
FEN (Pin 16):
Fast Enable. A logic high enables Fast Enable
Mode. In fast enable mode the integrated DC/DC converter
is active independent of the state of driver, receiver, and
termination enable pins allowing faster circuit enable
times than are otherwise possible. A logic low disables
Fast Enable Mode leaving the state of the DC/DC converter
dependent on the state of driver, receiver, and termina-
tion enable control inputs. The DC/DC converter powers
down only when FEN is low and all drivers, receivers, and
terminators are disabled (refer to Table 1).
LB (Pin 36):
Loopback Enable for Transceivers #1 and #2.
A logic high enables Logic Loopback diagnostic mode,
internally routing the driver input logic levels to the receiver
output pins within the same transceiver. This applies to
both RS232 channels as well as the RS485 driver/receiver.
The targeted receiver must be enabled for the loopback
signal to be available on its output. A logic low disables
loopback mode. In loopback mode, signals are not inverted
from driver inputs to receiver outputs.
2872f
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