LTC3605A
OPERATION
Output Voltage Programming
The output voltage is set by an external resistive divider
according to the following equation:
V
OUT
= 0.6V • (1 + R2/R1)
The resistive divider allows the V
FB
pin to sense a fraction
of the output voltage as shown in Figure 1.
V
OUT
R2
FB
LTC3605A
SGND
3605A F01
Output Power Good
When the LTC3605A’s output voltage is within the ±10%
window of the regulation point, which is reflected back as
a V
FB
voltage in the range of 0.54V to 0.66V, the output
voltage is good and the PGOOD pin is pulled high with an
external resistor. Otherwise, an internal open-drain pull-
down device (12Ω) will pull the PGOOD pin low. To prevent
unwanted PGOOD glitches during transients or dynamic
V
OUT
changes, the LTC3605A’s PGOOD falling edge includes
a blanking delay of approximately 52 switching cycles.
Multiphase Operation
For output loads that demand more than 5A of current,
multiple LTC3605As can be cascaded to run out of phase
to provide more output current. The CLKIN pin allows the
LTC3605A to synchronize to an external clock (±30% of
frequency programmed by RT) and the internal phase-
locked-loop allows the LTC3605A to lock onto CLKIN’s
phase as well. The CLKOUT signal can be connected to the
CLKIN pin of the following LTC3605A stage to line up both
the frequency and the phase of the entire system. Tying
the PHMODE pin to INTV
CC
, SGND or INTV
CC
/2 generates
a phase difference (between CLKIN and CLKOUT) of 180
degrees, 120 degrees, or 90 degrees respectively, which
corresponds to 2-phase, 3-phase or 4-phase operation. A
total of 12 phases can be cascaded to run simultaneously
out of phase with respect to each other by programming
the PHMODE pin of each LTC3605A to different levels.
Internal/External ITH Compensation
During single phase operation, the user can simplify
the loop compensation by tying the I
TH
pin to INTV
CC
to
enable internal compensation. This connects an internal
30k resistor in series with a 40pF capacitor to the output
of the error amplifier (internal ITH compensation point)
while also activating output voltage positioning such
that the output voltage will be 1.5% above regulation at
no load and 1.5% below regulation at full load. This is a
trade-off for simplicity instead of OPTI-LOOP
®
optimiza-
tion, where ITH components are external and are selected
to optimize the loop transient response with minimum
output capacitance.
3605af
C
FF
R1
Figure 1. Setting the Output Voltage
Programming Switching Frequency
Connecting a resistor from the RT pin to SGND programs
the switching frequency from 800kHz to 4MHz according
to the following formula:
Frequency (Hz)
=
1.6e11
R
T
(W)
The internal PLL has a synchronization range of ±30%
around its programmed frequency. Therefore, during
external clock synchronization be sure that the external
clock frequency is within this ±30% range of the RT pro-
grammed frequency.
Output Voltage Tracking and Soft-Start
The LTC3605A allows the user to program its output voltage
ramp rate by means of the TRACK/SS pin. An internal 2µA
pulls up the TRACK/SS pin to INTV
CC
. Putting an external
capacitor on TRACK/SS enables soft starting the output
to prevent current surge on the input supply. For output
tracking applications, TRACK/SS can be externally driven
by another voltage source. From 0V to 0.6V, the TRACK/SS
voltage will override the internal 0.6V reference input to the
error amplifier, thus regulating the feedback voltage to that
of TRACK/SS pins. During this start-up time, the LTC3605A
will operate in discontinuous mode. When TRACK/SS is
above 0.6V, tracking is disabled and the feedback voltage
will regulate to the internal reference voltage.
9
LINEAR [ LINEAR INTEGRATED SYSTEMS ]
