LTC4071
elecTrical characTerisTics
SYMBOL
I
LEAK
R
DSON
V
LBD
PARAMETER
Battery Disconnect Leakage
Current
Resistance of V
CC
– BAT Switch
Low Battery Disconnect
CONDITIONS
V
CC
< V
BAT
= 2.65V
I
BAT
= –1mA, V
HBO
High
V
BAT
Falling, I
BAT
= –1mA, LBSEL = V
CC
, 0°C < Temp < 125°C
V
BAT
Falling, I
BAT
= –1mA, LBSEL = V
CC
V
BAT
Falling, I
BAT
= –1mA, LBSEL = GND, 0°C < Temp < 125°C
V
BAT
Falling, I
BAT
= –1mA, LBSEL = GND
V
LBC_BAT
V
LBC_VCC
Low Battery Connect
Low Battery Connect
V
BAT
Rising, I
BAT
= –1mA, LBSEL = V
CC
V
BAT
Rising, I
BAT
= –1mA, LBSEL = GND
V
CC
Rising, LBSEL = V
CC
V
CC
Rising, LBSEL = GND
V
CC
Rising
l
l
l
l
The
l
denotes the specifications which apply over the full operating
junction temperature range. Conditions are V
NTC
= V
ADJ
= V
CC
, V
LBSEL
= GND, T
J
= 25°C unless otherwise specified. Current into a pin
is positive and current out of a pin is negative. All voltages are referenced to GND unless otherwise noted. (Note 2)
MIN
TYP
0.01
0.01
4
2.60
2.52
3.05
2.95
2.70
2.70
3.20
3.20
2.97
3.53
3.6
4.19
15
40
100
I
SINK
= 1mA, V
CC
= 3.7V
I
SOURCE
= –0.5mA, I
CC
= 1.5mA
Input Logic Low Level
Input Logic High Level
l
l
l
MAX
25
6
2.79
2.79
3.28
3.28
UNITS
nA
nA
Ω
V
V
V
V
V
V
V
V
Low Battery Disconnect
High Battery Status
V
HBTH
V
HBHY
V
OL
V
OH
V
ADJ_IL
V
ADJ_IH
I
ADJ(Z)
V
LBSEL_IL
V
LBSEL_IH
I
LBSEL
NTC
I
NTC
I
NTCBIAS
NTC
TH1
NTC
TH2
NTC
TH3
NTC
TH4
NTC
HY
Hysteresis
NTC Falling Below One of the NTC
TH
Thresholds
ADJ = 0V
ADJ = Floating
ADJ = V
CC
–57
–82
–107
∆V
FLOAT(NTC)
Delta Float Voltage per NTC
Comparator Step
NTC Leakage Current
Average NTCBIAS Sink Current
NTC Comparator Falling
Thresholds
0V ≤ NTC ≤ V
CC
Pulsed Duty Cycle < 0.002%
V
NTC
as Percentage of V
NTCBIAS
Amplitude
35.5
28.0
21.8
16.8
l
HBO Threshold (V
FLOAT
– V
CC
)
Hysteresis
CMOS Output Low
CMOS Output High
ADJ V
IL
ADJ V
IH
Allowable ADJ Leakage Current
in Floating State
LBSEL V
IL
LBSEL V
IH
LBSEL Leakage Current
75
mV
mV
Status Output: HBO
0.5
V
CC
– 0.6
0.3
V
CC
– 0.3
±3
250
1.4
–5
–5
0
0
30
36.5
29.0
22.8
17.8
30
–50
–75
–100
–43
–68
–93
5
5
50
38
30.5
23.8
18.8
V
V
V
V
µA
mV
V
nA
nA
pA
%
%
%
%
mV
mV
mV
mV
Selection Inputs: ADJ, LBSEL
Input Logic Low Level
Input Logic High Level
0 ≤ LBSEL ≤ V
CC
l
l
l
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC4071 is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTC4071E is guaranteed to meet performance specifications
for junction temperatures from 0°C to 85°C. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC4071I is guaranteed over the full –40°C to 125°C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operation
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors.
4071fc
3
LINEAR [ LINEAR INTEGRATED SYSTEMS ]
