LT1122
Fast Settling, JFET Input
Operational Amplifier
FEATURES
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DESCRIPTIO
340ns Typ
540ns Max
60V/µs Min
14MHz
1.2 MHz
60°
600µV Max
75pA Max
600pA Max
40pA Max
150pA Max
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100% Tested Settling Time
to 1mV at Sum Node, 10V Step
Tested with Fixed Feedback Capacitor
Slew Rate
Gain Bandwidth Product
Power Bandwidth (20Vp-p)
Unity Gain Stable; Phase Margin
Input Offset Voltage
Input Bias Current
25°C
70°C
Input Offset Current
25°C
70°C
Low Distortion
The LT1122 JFET input operational amplifier combines
high speed and precision performance.
A unique poly-gate JFET process minimizes gate series
resistance and gate-to-drain capacitance, facilitating wide
bandwidth performance, without degrading JFET transis-
tor matching.
It slews at 80V/µs and settles in 340ns. The LT1122 is
internally compensated to be unity gain stable, yet it has a
bandwidth of 14MHz at a supply current of only 7mA. Its
speed makes the LT1122 an ideal choice for fast settling
12-bit data conversion and acquisition systems.
The LT1122 offset voltage of 120µV, and voltage gain of
500,000 also support the 12-bit accurate applications.
The input bias current of 10pA and offset current of 4pA
combined with its speed allow the LT1122 to be used in
such applications as high speed sample and hold amplifi-
ers, peak detectors, and integrators.
APPLICATI
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Fast 12-Bit D/A Output Amplifiers
High Speed Buffers
Fast Sample and Hold Amplifiers
High Speed Integrators
Voltage to Frequency Converters
Active Filters
Log Amplifiers
Peak Detectors
TYPICAL APPLICATI
12-Bit Voltage Output D/A Converter
Large-Signal Response
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Cf
2
0mA TO 2mA
OR 4mA
3
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–
LT1122
6
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OUT
0V TO 10V
5V/DIV
12-BIT CURRENT OUTPUT D/A CONVERTER
C
f
= 5pF TO 17pF
(DEPENDING ON D/A CONVERTER USED)
LT1122•TA01
200ns/DIV
AV = –1
1122 TA07
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UO
UO
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LINER [ LINEAR TECHNOLOGY ]
