LTC1504A
APPLICATIONS INFORMATION
at this power level. The R
ON
of the internal power switches
increases as the die temperature rises, increasing the
power dissipation as the feedback loop continues to keep
the output current at 500mA. At high ambient tempera-
tures, this cycle may continue until the chip melts, since
the LTC1504A does not include any form of thermal
shutdown. Applications can safely draw peak currents
above the 500mA level, but the average power dissipation
should be carefully calculated so that the maximum 125°C
die temperature is not exceeded.
The LTC1504A dissipates the majority of its heat through
its pins, especially GND (Pin 4). Thermal resistance to
ambient can be optimized by connecting GND to a large
copper region on the PCB, which will serve as a heat sink.
Applications which will operate the LTC1504A near maxi-
mum power levels or which must withstand short circuits
of extended duration should maximize the copper area at
all pins and ensure that there is some airflow over the part
to carry away excess heat. For layout assistance in situa-
tions where power dissipation may be a concern, contact
the LTC Applications Department.
The current limit circuit can be used to limit the power
under mild overloads to a safe level, but severe overloads
where the output is shorted to ground may still cause the die
temperature to rise dangerously. For more information on
current limit behavior, see the Current Limit section.
LAYOUT CONSIDERATIONS
Like all precision switching regulators, the LTC1504A
requires special care in layout to ensure optimum perfor-
mance. The large peak currents coupled with significant
DC current flow will conspire to keep the output from
regulating properly if the layout is not carefully planned. A
poorly laid out op amp or data converter circuit will fail to
give the desired performance, but will usually still act like
an op amp or data converter. A poorly laid out LTC1504A
circuit may look nothing at all like a regulator.
Wire-wrap
or plug-in prototyping boards are not useful for bread-
boarding LTC1504A circuits!
Open-core inductors lo-
cated close to the LTC1504A can cause erratic regulation
due to stray flux coupled into PC board traces or the
LTC1504A itself. Changing the orientation of the inductor
or switching to a shielded type will solve the problem.
Perhaps most critical to proper LTC1504A performance is
the layout of the ground node and the location of the input
and output capacitors. The negative terminals of both the
input and output bypass capacitors should come together
at the same point, as close as possible to the LTC1504A
ground pin. The compensation network and soft start
capacitor can be connected together with their own trace,
which should come directly back to this same common
ground point. The input supply ground and the load return
should also connect to this common point. Each ground
line should come to a star connection with Pin 4 at the
center of the star. This node should be a fairly large copper
region to act as a heat sink if required.
Second in importance is the proximity of the low ESR (usually
ceramic) input bypass capacitor. It should be located as close
to the LTC1504A V
CC
and GND pins as physically possible.
Ideally, the capacitor should be located right next to the
package, straddling the SW pin. High peak current applica-
tions or applications with V
CC
greater than 6V may require a
1µF or larger ceramic capacitor in this position.
One node that isn’t quite so critical is SW. Extra lead length
or narrow traces at this pin will only add parasitic induc-
tance in series with the external inductor, slightly raising
its value. The SW trace need only be wide enough to
support the maximum peak current under short circuit
conditions—perhaps 1A. If a trace needs to be compro-
mised to make the layout work, this is the one. Note that
long traces at the SW node may aggravate EMI consider-
ations—don’t get carried away. If a Schottky diode is used
at the SW node, it should be located at the LTC1504A end
of the trace, close to the device pins.
The LTC Applications Department has constructed liter-
ally hundreds of layouts for the LTC1504A and related
parts, many of which worked and some of which are now
archived in the Bad Layout Hall of Fame. If you need layout
assistance or you think you have a candidate layout for the
Hall of Fame, give Applications a call at (408) 954-8400.
Demo boards with properly designed layouts are available
and specialized layouts can be designed if required. The
applications team is also experienced in external compo-
nent selection for a wide variety of applications, and they
have a never-ending selection of tall tales to tell as well.
When in doubt, give them a call.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
W
U
U
11
LINER [ LINEAR TECHNOLOGY ]
