LT1507
APPLICATIONS INFORMATION
This is safe for short periods of time, but it would be
prudent to check with the diode manufacturer if continu-
ous operation under these conditions must be tolerated.
BOOST PIN CONSIDERATIONS
For most applications, the boost components are a 0.22µF
capacitor and an MBR0520 or BAT85 Schottky diode. This
capacitor value is twice that suggested for the LT1376
because the lower voltages commonly found in LT1507
applications may require lower ripple voltage across the
capacitor to ensure adequate boost voltage under worst-
case conditions. Efficiency is not affected by the capacitor
value, but the capacitor should have an ESR of less than
2Ω to ensure that it can be recharged fully under the worst-
case condition of minimum input voltage. Almost any type
of film or ceramic capacitor will work fine.
The anode of the diode can be connected to the regulated
output voltage or the unregulated input voltage. The
“boost voltage” generated across the boost capacitor is
then nearly identical to the anode voltage. The input
connection minimizes start-up problems and gives plenty
of boost voltage, but efficiency is slightly lower, especially
with input voltages above 10V. For 5V to 3.3V operation,
or any output voltage less than 3.3V, the diode should be
connected to the input. With input voltage more than 3V
above the output and an output voltage of at least 3.3V the
output connection will give better efficiency. Use the
BAT85 Schottky diode for 3.3V applications where the
anode is connected to the output.
LAYOUT CONSIDERATIONS
Suggested layout for the LT1507 is shown in Figure 3. The
main concern for layout is to minimize the length of the
MINIMIZE AREA OF
CONNECTIONS TO THE
SWITCH NODE AND
BOOST NODE, BUT OBSERVE
CURRENT DENSITY LIMITATIONS
IN PATH TO L1
KEEP INPUT CAPACITOR
AND CATCH DIODE CLOSE
TO REGULATOR AND
TERMINATE THEM
TO SAME POINT
C3
IN
SW
D1
SHDN
SYNC
R1
FB
GND
R2
R
C
L1
C1
OUTPUT
GROUND RING NEED
NOT BE AS SHOWN.
(NORMALLY EXISTS AS
INTERNAL PLANE)
CONNECT OUTPUT CAPACITOR
DIRECTLY TO HEAVY GROUND
U
W
U
U
INPUT
C2
D2
C
F
BOOST
V
C
C
C
C
F
AND R
C
ARE OPTIONAL.
SEE FREQUENCY
COMPENSATION
SYNC
TAKE OUTPUT DIRECTLY FROM END OF OUTPUT
CAPACITOR TO AVOID PARASITIC RESISTANCE
AND INDUCTANCE (KELVIN CONNECTION)
TERMINATE GND PIN
DIRECTLY TO GROUND
PLANE WITH VIA TO
MINIMIZE EMI. (MINIMIZE
DISTANCE TO INPUT
CAPACITOR C3). CONNECT
FEEDBACK RESISTORS AND
COMPENSATION
COMPONENTS DIRECTLY
TO GROUND PLANE OR TO
SWITCHER GND PIN.
LT1507 • F03
Figure 3. Suggested Layout
13
LINER [ LINEAR TECHNOLOGY ]
