LT1761 Series
W U U
APPLICATIO S I FOR ATIO
U
equalto1.22V/R1andthecurrentinR2isthecurrentinR1
plus the ADJ pin bias current. The ADJ pin bias current,
30nA at 25°C, flows through R2 into the ADJ pin. The
output voltage can be calculated using the formula in
Figure 1. The value of R1 should be no greater than 250k
to minimize errors in the output voltage caused by the ADJ
pinbiascurrent.Notethatinshutdowntheoutputisturned
off and the divider current will be zero. Curves of ADJ
Pin Voltage vs Temperature and ADJ Pin Bias Current
vs Temperature appear in the Typical Performance
Characteristics.
Typical Performance Characteristics section). However,
regulator start-up time is inversely proportional to the size
of the bypass capacitor, slowing to 15ms with a 0.01µF
bypass capacitor and 10µF output capacitor.
Output Capacitance and Transient Response
The LT1761 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small
capacitors. A minimum output capacitor of 1µF with an
ESR of 3Ω or less is recommended to prevent oscilla-
tions. The LT1761-X is a micropower device and output
transient response will be a function of output capaci-
tance. Larger values of output capacitance decrease the
peakdeviationsandprovideimprovedtransientresponse
for larger load current changes. Bypass capacitors, used
to decouple individual components powered by the
LT1761-X, will increase the effective output capacitor
value. With larger capacitors used to bypass the refer-
ence (for low noise operation), larger values of output
capacitors are needed. For 100pF of bypass capacitance,
2.2µF of output capacitor is recommended. With a 330pF
bypass capacitor or larger, a 3.3µF output capacitor is
recommended. TheshadedregionofFigure2definesthe
region over which the LT1761 regulators are stable. The
minimum ESR needed is defined by the amount of
bypasscapacitanceused,whilethemaximumESRis3Ω.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.22V.
Specifications for output voltages greater than 1.22V will
be proportional to the ratio of the desired output voltage to
1.22V: VOUT/1.22V. For example, load regulation for an
output current change of 1mA to 100mA is –1mV typical
at VOUT = 1.22V. At VOUT = 12V, load regulation is:
(12V/1.22V)(–1mV) = –9.8mV
IN
OUT
ADJ
V
OUT
R2
R1
V
= 1.22V 1+
= 1.22V
+ I
(
R2
+
)(
)
OUT
ADJ
V
IN
R2
R1
LT1761
GND
V
ADJ
I
= 30nA AT 25°C
ADJ
OUTPUT RANGE = 1.22V TO 20V
1761 F01
Figure 1. Adjustable Operation
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common
Bypass Capacitance and Low Noise Performance
The LT1761 regulators may be used with the addition of a
bypass capacitor from VOUT to the BYP pin to lower output
voltage noise. A good quality low leakage capacitor is rec-
ommended. Thiscapacitorwillbypassthereferenceofthe
regulator, providing a low frequency noise pole. The noise
pole provided by this bypass capacitor will lower the out-
put voltage noise to as low as 20µVRMS with the addition
of a 0.01µF bypass capacitor. Using a bypass capacitor
has the added benefit of improving transient response.
With no bypass capacitor and a 10µF output capacitor, a
10mAto100mAloadstepwillsettletowithin1%ofitsfinal
value in less than 100µs. With the addition of a 0.01µF
bypasscapacitor,theoutputwillstaywithin1%fora10mA
to 100mA load step (see LT1761-5 Transient Reponse in
4.0
3.5
3.0
STABLE REGION
2.5
2.0
C
= 0
1.5
1.0
0.5
0
BYP
C
= 100pF
BYP
C
= 330pF
BYP
C
> 3300pF
BYP
1
3
6
9 10
8
2
4
5
7
OUTPUT CAPACITANCE (µF)
1761 F02
Figure 2. Stability
13
Linear [ Linear ]
