LT3420/LT3420-1
OPERATIO
I
SW
1A/DIV
I
SEC
200mA/DIV
V
SW
20V/DIV
2µs/DIV
3420 F06a
Figure 6a. Switching Waveforms with
V
OUT
= 100V, V
CC
= V
BAT
= 3.3V
of Q1 so that the peak current of Q1 is 1.4A and the mini-
mum secondary current is 40mA (typical values).
The previously described charging cycle must be halted
when the output voltage reaches the desired value. The
LT3420 monitors the output voltage via the flyback pulse
on the SW pin. When Q1 turns off, the secondary side
conducts current turning on diode D1. Since the diode is
conducting and the SEC pin is at nearly ground, the voltage
across the secondary is nearly equal to V
OUT
. The voltage
across the primary is therefore close to V
OUT
/N. A current
proportional to V
OUT
/N flows through R1 and into the R
FB
pin. The current flows out of the R
REF
pin through a resis-
tor creating a ground referred voltage. When this voltage
exceeds an internal 1V reference voltage, the output of
comparator A3 goes high which resets the master latch. The
Q output of the master latch goes low, disabling the entire
power delivery block and enabling the refresh timer.
Leakage Spike Blanking
Another function of the LT3420 is leakage spike blanking
when the power switch, Q1, turns off. Right after Q1 turns
off, a one-shot turns on Q2 for 200ns (typ). With Q2 on,
comparator A3 is disabled. This function may prevent A3
from false tripping on the leakage inductance spike on the
SW pin. In practice, the PNP transistor Q3 filters out the
leakage spike.
Refresh Timer
When the refresh timer is enabled, a 2.5µA current source
is switched on, charging up the external timing capacitor,
U
I
SW
1A/DIV
I
SEC
200mA/DIV
V
SW
20V/DIV
2µs/DIV
3420 F06b
Figure 6b. Switching Waveforms with
V
OUT
= 300V, V
CC
= V
BAT
= 3.3V
C3, from its initial voltage towards 1V. When the voltage
on C3 reaches 1V, the polarity of the current source changes
and 2.5µA discharges C3. When the voltage on C3 reaches
0.5V, the refresh timer sends a set pulse to the master latch,
which puts the LT3420 into the charging mode.
Interface/Control
The CHARGE pin serves two functions. The first is to
enable or shutdown the part depending on the level of the
pin (high
=
enable, low
=
shutdown). The second is to
force the part into the charging mode (low→high transi-
tion). The LT3420 also has a DONE pin, which signals
whether or not the part is done charging the photoflash
capacitor. The DONE pin is an open collector NPN switch
(Q5) so an external pull-up resistor is needed. Whenever
the part is in charging mode, DONE will be low. DONE will
go high when the charging mode is complete. Both the
CHARGE and DONE pins can be easily interfaced to a
microprocessor in a digital or film camera.
LT3420-1 Differences
The LT3420-1 has different primary and secondary cur-
rent limit levels. The primary current limit level of the
LT3420-1 is 1A (typ) and the secondary current limit is
15mA (typ). The LT3420-1 has no leakage spike blanking
which causes no problems since the PNP transistor, Q3,
provides adequate filtering. Finally, the breakdown voltage
of the SW pin of the LT3420-1 is higher at 50V.
3420fa
9
LINER [ LINEAR TECHNOLOGY ]
