LTC1262
BLOCK DIAGRAM
W
V
CC
+
S3A
C1
+
C1
C1
–
S3B
C2
+
C2
C2
–
S3D
CHARGE
PUMP
OSCILLATOR
S4B
S4A
D2
S3C
D1 S1
SHDN
V
OUT
R1
C
IN
+
R2
C
OUT
S1 AND S2 SHOWN WITH SHDN PIN LOW.
S3A, S3B, S3C, S3D, S4A AND S4B SHOWN WITH OSCILLATOR OUTPUT LOW AND V
DIV
< V
BGAP
– V
HYST
.
COMPARATOR HYSTERISIS IS
±V
HYST
.
TI I G DIAGRA S
1
t
OFF
V
OUT
5.1V
t
ON
11.4V
V
OUT
C1
0.22µF
V
CC
V
CC
C2
0.22µF
3
4
C2
–
C2
+
V
OUT
V
CC
6
5
V
SHDN
1.4V
1.4V
0V
LTC1262 • F01
V
CC
4.75V TO 5V
Figure 1. LTC1262 Timing Diagram
Figure 2. LTC1262 Timing Circuit
4
+
+
–
V
BGAP
BANDGAP
REFERENCE
V
DIV
R3
+
S2
GND
LTC1262 • BD
W
UW
C1
–
C1
+
SHDN
GND
LTC1262
8
7
V
SHUTDOWN
2
C
OUT
4.7µF
C
IN
4.7µF
V
OUT
LTC1262 • F02