LTC1470/LTC1471
APPLICATIONS INFORMATION
Truth Table for CL-PD6710 Controller
A_V
CC
_3
EN0
0
0
1
1
A_V
CC
_5
EN1
0
1
0
1
OUT
Hi-Z
3.3V
5V
Hi-Z
Interfacing with “365” Type Controllers
The LTC1470 also interfaces directly with “365” type
controllers as shown in Figure 2. Note that the V
CC
Enable
inputs are connected differently than to the CL-PD6710
controller because the “365” type controllers use active-
high logic control of the V
CC
switches (see the following
Switch Truth Table). No “glue” logic is required to inter-
face to this type of PCMCIA compatible controller.
3.3V
0.1µF
3V
IN
5V
0.1µF
“365” TYPE
CONTROLLER
A_V
CC
_EN0
A_V
CC
_EN1
LTC1470
EN0
EN1
GND
OUT
OUT
(OFF/3.3V/5V)
5V
IN
3V
IN
+
1µF
TANT
10k
1470/71 F02
Figure 2. Direct Interface with “365” Type PCMCIA Controller
Truth Table for “365” Type Controller
A_V
CC
_EN0
EN0
0
0
1
1
A_V
CC
_EN1
EN1
0
1
0
1
OUT
Hi-Z
3.3V
5V
Hi-Z
U
W
U
U
Supply Bypassing
For best results bypass the supply input pins with 1µF
capacitors as close as possible to the LTC1470. Some-
times much larger capacitors are already available at the
outputs of the 3.3V and 5V power supply. In this case it is
still good practice to use 0.1µF capacitors as close as
possible to the device, especially if the power supply
output capacitors are more than 2" away on the printed
circuit board.
Output Capacitors and Pull-Down Resistor
The output pin is designed to ramp on slowly, typically
400µs rise time. Therefore, capacitors as large as 150µF
can be driven without producing voltage spikes on the
3V
IN
or 5V
IN
supply pins (see graphs in Typical Perfor-
mance Characteristics section). The output pin should
have a 0.1µF to 1µF capacitor for noise reduction and
smoothing.
A 10k pull-down resistor is recommended at the output to
ensure that the output capacitor is fully discharged when the
output is switched OFF. This resistor also ensures that the
output is discharged between the 3.3V and 5V transition.
Supply Sequencing
TO CARD
V
CC
PINS
Because the 5V supply is the source of power for both of the
switch control circuits, it is best to sequence the power
supplies such that the 5V supply is powered before, or
simultaneous to, the application of 3.3V.
It is interesting to note, however, that the switches are NMOS
transistors which require charge pumps to generate gate
voltages higher than the supply rails for full enhancement.
Because the gate voltages start at 0V when the supplies are
first activated, the switches always start in the off state and
do not produce glitches at the outputs when powered.
If the 5V supply must be turned off, it is important to program
all switches to the Hi-Z or 0V state at least 100µs before the
5V power is removed to ensure that the NMOS switch gates
are fully discharged to 0V. Whenever possible, however, it is
best to leave the 5V
IN
pin(s) continuously powered. The
LTC1470/LTC1471 quiescent current drops to <1µA with all
the switches turned off and therefore no 5V power is
consumed in the standby mode.
7
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