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LTC1411 参数 Datasheet PDF下载

LTC1411图片预览
型号: LTC1411
PDF下载: 下载PDF文件 查看货源
内容描述: 串行12位/ 14位, 2.8Msps [Serial 12-Bit/14-Bit, 2.8Msps]
分类和应用:
文件页数/大小: 22 页 / 643 K
品牌: LINER [ LINEAR TECHNOLOGY ]
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LTC1403-1/LTC1403A-1
Serial 12-Bit/14-Bit, 2.8Msps
Sampling ADCs with Shutdown
FEATURES
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DESCRIPTION
The LTC
®
1403-1/LTC1403A-1 are 12-bit/14-bit, 2.8Msps
serial ADCs with differential inputs. The devices draw only
4.7mA from a single 3V supply and come in a tiny 10-lead
MSE package. A Sleep shutdown feature lowers power
consumption to 10µW. The combination of speed, low
power and tiny package makes the LTC1403-1/LTC1403A-1
suitable for high speed, portable applications.
The 80dB common mode rejection allows users to elimi-
nate ground loops and common mode noise by measuring
signals differentially from the source.
The devices convert –1.25V to 1.25V bipolar inputs
differentially. The absolute voltage swing for A
IN+
and
A
IN –
extends from ground to the supply voltage.
The serial interface sends out the conversion results during
the 16 clock cycles following CONV
for compatibility with
standard serial interfaces. If two additional clock cycles
for acquisition time are allowed after the data stream in
between conversions, the full sampling rate of 2.8Msps
can be achieved with a 50.4MHz clock.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
2.8Msps Conversion Rate
Low Power Dissipation: 14mW
3V Single Supply Operation
2.5V Internal Bandgap Reference can be Overdriven
3-Wire Serial Interface
Sleep (10µW) Shutdown Mode
Nap (3mW) Shutdown Mode
80dB Common Mode Rejection
±1.25V Bipolar Input Range
Tiny 10-Lead MSE Package
APPLICATIONS
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Communications
Data Acquisition Systems
Uninterrupted Power Supplies
Multiphase Motor Control
Multiplexed Data Acquisition
BLOCK DIAGRAM
10µF
3V
LTC1403A-1
A
IN+
A
IN–
1
7
THD, 2nd and 3rd vs Input
Frequency for Differential Input
Signals
–44
V
DD
THREE-
STATE
SERIAL
OUTPUT
PORT
14
14-BIT LATCH
–50
–56
8
SDO
+
S&H
14-BIT ADC
THD, 2nd, 3rd (dB)
–62
–68
–74
–80
–86
–92
–98
–104
0.1
1
10
FREQUENCY (MHz)
100
14031 TA01b
2
V
REF
2.5V
REFERENCE
6
11
THD
3rd
3
10µF
4
10
TIMING
LOGIC
9
EXPOSED PAD
CONV
2nd
GND
5
SCK
14031 TA01a
14031fc
1