LTC1772
U
U W
FUNCTIONAL DIAGRA
–
V
SENSE
4
IN
5
+
–
ICMP
V
IN
RS1
PGATE
6
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
SLOPE
COMP
R
Q
S
OSC
–
+
FREQ
BURST
CMP
OVP
FOLDBACK
+
–
+
–
0.3V
SHORT-CIRCUIT
DETECT
V
+
SLEEP
REF
0.15V
60mV
V
IN
EAMP
V
REF
+
–
0.8V
0.5µA
V
FB
I
/RUN
1
3
+
–
TH
V
IN
V
IN
0.3V
0.35V
+
–
SHDN
UV
SHDN
CMP
VOLTAGE
REFERENCE
V
REF
0.8V
GND
2
UNDERVOLTAGE
LOCKOUT
1.2V
1772FD
U
(Refer to Functional Diagram)
OPERATIO
load current increases, it causes a slight decrease in VFB
relative to the 0.8V reference, which in turn causes the
ITH/RUN voltage to increase until the average inductor
current matches the new load current.
Main Control Loop
TheLTC1772isaconstantfrequencycurrentmodeswitch-
ing regulator. During normal operation, the external
P-channel power MOSFET is turned on each cycle when
the oscillator sets the RS latch (RS1) and turned off when
the current comparator (ICMP) resets the latch. The peak
inductor current at which ICMP resets the RS latch is
controlled by the voltage on the ITH/RUN pin, which is the
output of the error amplifier EAMP. An external resistive
divider connected between VOUT and ground allows the
EAMPtoreceiveanoutputfeedbackvoltageVFB.Whenthe
ThemaincontrolloopisshutdownbypullingtheITH/RUN
pin low. Releasing ITH/RUN allows an internal 0.5µA
current source to charge up the external compensation
network. When the ITH/RUN pin reaches 0.35V, the main
control loop is enabled with the ITH/RUN voltage then
pulled up to its zero current level of approximately 0.7V.
Astheexternalcompensationnetworkcontinuestocharge
4
Linear [ Linear ]
