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LTC3413EFE 参数 Datasheet PDF下载

LTC3413EFE图片预览
型号: LTC3413EFE
PDF下载: 下载PDF文件 查看货源
内容描述: 3A , 2MHz的单片同步稳压器,用于DDR / QDR存储器终端 [3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination]
分类和应用: 稳压器开关式稳压器或控制器电源电路存储开关式控制器光电二极管双倍数据速率
文件页数/大小: 16 页 / 244 K
品牌: LINER [ LINEAR TECHNOLOGY ]
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LTC3413
3A, 2MHz Monolithic
Synchronous Regulator for
DDR/QDR Memory Termination
FEATURES
s
s
s
s
s
s
s
s
s
s
s
s
DESCRIPTIO
High Efficiency: Up to 90%
±3A
Output Current
Symmetrical Source and Sink Output Current Limit
Low R
DS(ON)
Internal Switch: 85mΩ
No Schottky Diode Required
2.25V to 5.5V Input Voltage Range
V
OUT
= V
REF
/2
±1%
Output Voltage Accuracy
Programmable Switching Frequency: Up to 2MHz
Power Good Output Voltage Monitor
Overtemperature Protected
Available in 16-Lead TSSOP Exposed Pad Package
The LTC
®
3413 is a high efficiency monolithic synchro-
nous step-down DC/DC converter utilizing a constant
frequency, current mode architecture. It operates from an
input voltage range of 2.25V to 5.5V and provides a
regulated output voltage equal to (0.5)V
REF
while sourcing
or sinking up to 3A of output current. An internal voltage
divider reduces component count and eliminates the need
for external resistors by dividing the reference voltage in
half. The internal synchronous power switch with 85mΩ
on-resistance increases efficiency and eliminates the need
for an external Schottky diode. Switching frequencies up
to 2MHz are set by an external resistor.
Forced-continuous operation in the LTC3413 reduces
noise and RF interference. Fault protection is provided by
an overcurrent comparator that limits output current dur-
ing both sourcing and sinking operations. Adjustable
compensation allows the transient response to be opti-
mized over a wide range of loads and output capacitors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress
Semiconductor, Hitachi, IDT, Micron Technology, Inc. and Samsung.
APPLICATIO S
s
s
s
Bus Termination: DDR and QDR
TM
Memory,
SSTL, HSTL, ...
Notebook Computers
Distributed Power Systems
TYPICAL APPLICATIO
V
IN
2.5V
100
22µF
SV
IN
V
REF
4.7M
330pF
LTC3413
RUN/SS
5.11k
I
TH
2200pF
R
T
309k
V
FB
3413 F01a
90
80
V
IN
= 2.5V
f = 1MHz
PV
IN
PGOOD
SW
PGND
SGND
C
OUT
100µF
×2
V
OUT
1.25V
±3A
EFFICIENCY (%)
L1
0.47µH
70
60
50
40
30
20
10
0
0.01
0.1
1
LOAD CURRENT (A)
10
3413 F01b
L1: VISHAY DALE IHLP-2525CZ-01 0.47
C
OUT
: TDK C4532X5R0J107M
Figure 1a. High Efficiency Bus Termination Supply
Figure 1b. Efficiency vs Load Current
sn3413 3413fs
U
U
U
1