LTC3455
U
W U U
APPLICATIO S I FOR ATIO
LTC3455
19
23
ON2
PBSTAT
ON 24
SWITCHER 2
ENABLED
PWRON 22
V
9
+
–
BAT
SWITCHER 1
ENABLED
3V
WALLFB 11
+
–
CHARGER
ENABLED
1.23V
USB
8
6
+
–
USB POWER
CONTROLLER
ENABLED
3.9V
SUSPEND
3455 F03
Figure 3. Turn-On Logic Diagram for LTC3455
Startup and Shutdown When USB or Wall Powered
output sequencing when both switchers are enabled at
startup with the ON2 pin tied to VMAX. The turn-on of both
switchersisalwaysdelayeduntiltheVMAX pinhasreached
the VBAT pin voltage.
Whenever USB or wall power is present (as sensed by the
USB and WALLFB pins), Switcher 1 and the battery
charger will always be enabled. If the LTC3455 is off and
external power is applied, both the charger and Switcher
1 will start independent of the state of the ON and PWRON
pins. This provides maximum battery run-time by always
allowing the battery to charge whenever external power is
available, and ensures that the microcontroller is always
alivewhenexternalpowerisavailable(thisisimportantfor
designs that utilize coulomb-counting or other battery
monitoring techniques). Switcher 2 starts only if ON2 is
also pulled high. Figure 3 shows the turn-on logic diagram
for the LTC3455.
Reset Signal (RST)
A 200ms reset signal (the RST pin is pulled low) is
providedforproperinitializationofamicrocontrollerwhen-
ever the LTC3455 is first turned on, either by the ON or
PWRON pins, or by the application of external power. The
RST signal is also pulled low whenever the LTC3455 is in
shutdown, ensuring no false starts for the microcontroller
as the output voltages are rising or collapsing. In the event
of a fault condition the RST pin will be pulled low.
Starting Switcher 2/Power Supply Sequencing
PWRON/ON2
2V/DIV
Switcher 2 can operate only when Switcher 1 is also
enabled and in regulation. The ON2 pin can be driven by a
logic signal for independent control of Switcher 2. If both
outputs always operate together, tie the ON2 pin to the
VMAX pin. This will enable Switcher 2 after the output of
Switcher 1 has reached 90% of its final value. This power-
up delay ensures proper supply sequencing and reduces
the peak battery current at startup. Figure 4 shows the
VMAX
2V/DIV
VOUT1 (1.8V)
2V/DIV
V
OUT2 (3.3V)
2V/DIV
3455 F04
100µs/DIV
Figure 4. Sequencing for Switcher 1 and 2 Outputs
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14
Linear [ Linear ]
