LTC4300A-1/LTC4300A-2
Hot Swappable
2-Wire Bus Buffers
FEATURES
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DESCRIPTIO
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Bidirectional Buffer for SDA and SCL Lines
Increases Fanout
Prevents SDA and SCL Corruption During Live
Board Insertion and Removal from Backplane
Isolates Input SDA and SCL Lines from Output
Compatible with I
2
C
TM
, I
2
C Fast Mode and SMBus
Standards (Up to 400kHz Operation)
Small MSOP 8-Pin Package
Low I
CC
Chip Disable: <1µA (LTC4300A-1)
READY Open Drain Output (LTC4300A-1)
1V Precharge on all SDA and SCL Lines
Supports Clock Stretching, Arbitration and
Synchronization
5V to 3.3V Level Translation (LTC4300A-2)
High Impedance SDA, SCL Pins for V
CC
= 0V
The LTC
®
4300A series hot swappable 2-wire bus buffers
allow I/O card insertion into a live backplane without
corruption of the data and clock busses. When the con-
nection is made, the LTC4300A-1/LTC4300A-2 provide
bidirectional buffering, keeping the backplane and card
capacitances isolated. Rise-time accelerator circuitry*
allows the use of weaker DC pull-up currents while still
meeting rise-time requirements. During insertion, the
SDA and SCL lines are precharged to 1V to minimize bus
disturbances.
The LTC4300A-1 incorporates a CMOS threshold digital
ENABLE input pin, which forces the part into a low current
mode when driven to ground and sets normal operation when
driven to V
CC
. It also includes an open drain READY output
pin, which indicates that the backplane and card sides are
connected together. The LTC4300A-2 replaces the ENABLE
pin with a dedicated supply voltage pin, V
CC2
, for the card
side, providing level shifting between 3.3V and 5V systems.
Both the backplane and card may be powered with supply
voltages ranging from 2.7V to 5.5V, with no contraints on
which supply voltage is higher. The LTC4300A-2 also re-
places the READY pin with a digital CMOS input pin, ACC,
which enables and disables the rise-time accelerator currents.
The LTC4300A is available in a small 8-pin MSOP package.
APPLICATIO S
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Hot Board Insertion
Servers
Capacitance Buffer/Bus Extender
Desktop Computer
, LTC and LT are registered trademarks of Linear Technology Corporation.
I
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C is a trademark of Philips Electronics N. V.
*U.S. Patent No. 6,650,174
TYPICAL APPLICATIO
V
CC
3.3V
R1
10k
SCLIN
R2
10k
3
8
C1
0.01µF
Input–Output Connection t
PLH
R3
10k
2
R4
10k
SCLOUT
OUTPUT
SIDE
50pF
INPUT
SIDE
150pF
SDAIN
6
7
SDAOUT
1
LTC4300A-1
5
READY
ENABLE
GND
4
4300A-1/2
TA01
U
4300A TA02
U
U
sn4300a12 4300a12fs
1
LINER [ LINEAR TECHNOLOGY ]
