PRELIMINARY INFORMATION
L9D340G64BG2
4.0 Gb, DDR3, 64 M x 64 Integrated Module (IMOD)
T
ABLE
3 - B
ALL
/S
IGNAL
L
OCATION AND
D
ESCRIPTION
C
ONTINUED
Ball Assignments
Symbol
Type
Description
F11, G4, E8, E3, F2, E9,
DQ
48,
DQ
49,
Supply Data Input/Output:
LOW Byte, HIGH WORD (WORD 4). Pin referenced to VrefDQ.
DQ
50,
DQ
51,
H3, G8
DQ
52,
DQ
53,
DQ
54,
DQ
55
H9, H5, G9, G6, H4,
H11, J6, H8
DQ
56,
DQ
57,
Supply Data Input/Output:
HIGH Byte, HIGH WORD (WORD 4). Pin referenced to VrefDQ.
DQ
58,
DQ
59,
DQ
60,
DQ
61,
DQ
62,
DQ
63
B3, B5, B6, B8, B9, B11,
C2, C12, J7, K2, K6, K8,
K12, L5, L9, M2, M6, M8,
M12, N7, W2, W12, Y3,
Y5, Y6, Y8, Y9, Y11
A3, A4, A10, A11, C1,
C13, D1, D13, K1, K13,
M1, M13, V13, W1, W13,
AA3, AA4, AA10, AA11
B4, B7, B10, C3, C11,
D2, D12, H7, K7, L2,
L6, L8, L12, M7, P7, V2,
V12, W3, W11, Y2, Y4,
Y7, Y10, Y12
A2, A7, A12, A13, B1,
B13, L1, L13, Y1, Y13,
AA1, AA2, AA7, AA12,
AA13
E7
L7
C5, C6, D5, D6
A1
A5, A6, A8, A9, C4, C7,
C8, C9, C10, D3, D4,
D7, D8, E1, E4, E5, E13,
F1, F5, F13, G1, G13,
H1, H13, J1, J13, N1,
N13, P1, P13, R1, R13,
T1, T7, T8, T9, T13, U1,
U7, U8, U13, V8, V9,
V10, V11, W4, W5, W7,
W8, W9, W10, AA5,
AA6, AA8, AA9
V
refCA
V
refDQ
ZQx
UNPOPULATED
V
cc
Supply
Power Supply: 1.5V ± 0.075V
V
cc
Q
Supply
Data I/O Supply: 1.5V ± 0.075V
V
ss
Supply
Ground
V
ss
Q
Supply
Data I/O Ground: Isolated from Core for improved noise immunity
Supply
Voltage Reference CORE: VrefCA must be maintained at all times
Supply
Voltage Reference I/O: VrefDQ must be maintained at all times.
Ref.
_
External Reference for output drive calibration
Unpopulated, un-plated matrix location(s)
No Connect: These ball locations have no electrical connection internally. Locations other than
those indicating an upgrade or alternative function should be left isolated (non-connected)
NC
LOGIC Devices Incorporated
www.logicdevices.com
10
High Performance, Integrated Memory Module Product
May 19, 2009 LDS-L9D340G6BG2-A
LOGIC [ LOGIC DEVICES INCORPORATED ]
