LF3311
Horizontal / Vertical Digital Image Filter
DEVICES INCORPORATED
Improved Performance
FEATURES
111 MHz Data Rate
12-bit Data and Coefficients
On-board Memory for 256 Horizontal and 256 Verti-
cal Coefficient Sets
LF Interface™ Allows All 512 Coefficient Sets to be
Updated Within Vertical Blanking
Selectable 12-bit Data Output with User-Defined
Rounding and Limiting
Seven 3K x 12-bit, Programmable Two-Mode Line
Buffers
16 Horizontal Filter Taps
8 Vertical Filter Taps
Two Operating Modes: Dimensionally Sepa-
rate and Orthogonal
Supports Interleaved Data Streams
Horizontal Filter Supports Decimation up to
16:1 for Increasing Number of Filter Taps
3.3 Volt Power Supply
5 Volt Tolerant I/O
144 Lead PQFP
DESCRIPTION
The LF3311 is an improved version of the LF3310 Horizontal/Vertical Digital Image Filter capable of
operating at speeds of up to 111MHz. This improved speed will increase flexibility and performance. The
added performance will enable you to use this device in more applications. For example, four interleaved
data streams of 27MHz can now be processed within one device. The part is functionally identical to the
LF3310 with the exception that the filter data path is specified to operate faster than the LF Control Interface.
When operating the filter at speeds in excess of 90MHz, loading of coefficients via the LF Interface must
be throttled to a maximum of 90MHz by asserting the PAUSE pin as required to allow sufficient setup time
for the configuration data provided to the Figure 1 below demonstrates the switching waveforms of case 2,
while the switching characteristics are shown in Table 1.
Figure 1. Switching Waveforms: LF Interface
TM
CLK
tS0
LDA
LDB
PAUSEA
PAUSEB
CFA 11-0
CFB 11-0
tCFH
tCFS
ADDRESS
CF0
CF1
tPS
tPWH
tPWL
tLH
tCYC
tPH
The LF3311 remains a two-dimensional digital image filter capable of filtering data at real-time video rates.
The device contains both a horizontal and a vertical filter which may be cascaded or used concurrently for
two-dimensional filtering. The input, coefficient, and output data are all 12-bits and in two’s complement
format. The horizontal filter is designed to take advantage of symmetric coefficient sets. When symmetric
coefficient sets are used, the horizontal filter can be configured as a 16-tap FIR filter. When asymmetric
coefficient sets are used, it can be configured as an 8-tap FIR filter. The vertical filter is an 8-tap FIR
filter with all required line buffers contained on-chip. The line buffers can store video lines with lengths
from 4 to 3076 pixels. Horizontal filter Interleave/Decimation Registers (I/D Registers) and the vertical filter
line buffers allow interleaved data to be fed directly into the device and filtered without separating the data
into individual data streams. The horizontal filter can handle a maximum of sixteen data sets interleaved
together. The vertical filter can handle interleaved video lines which contain 3076 or less data values. The
I/D Registers and horizontal accumulator facilitate using decimation to increase the number of filter taps
in the horizontal filter. It will support a decimation factor of up to 16:1. The device has on-chip storage
for 256 horizontal coefficient sets and 256 vertical coefficient sets. Each filter’s coefficients are loaded
independently of each other allowing one filter’s coefficients to be updated without affecting the other filter’s
coefficients. In addition, a horizontal or vertical coefficient set can be updated independently from the other
coefficient sets in the same filter.
LOGIC Devices Incorporated
1
Video Imaging Products
9/19/05 LDS.3311-C
LOGIC [ LOGIC DEVICES INCORPORATED ]
