Figure 3
shows a more detailed chipset block diagram.
Figure 3
Detailed Chipset Block Diagram
L64733
Xtal
Osc
4–7.26 MHz
RF In
RF Out
Tank
Circuit
RF
Switch
Amp
÷
by 8
Phase
Detect.
Charge
Pump
To External
Loop Filter
Quadrature
Down-Converter
VCO
X2
Dual-
Modulus
Prescaler
PSOUT
2
90°
Fc
2
2
2
FDOUB
INSEL
FLCLK
QOUT
PLLIN
AGC1
AGC2
MOD
L64734
Synthesizer Control Module
AGC
Control
Carrier
Loop Control
BPSK/QPSK
Demodulator
Timing Loop
Control
Filter
Control
Module
CPG
DEMI
Dual
ADC
Interpolator/Decimation
Filter
Matched
Filter
Output
Control
1/T
DEMQ
Microcontroller Data and Address Bus
Clk
(from L64734
on-chip PLL)
FEC Decoder Pipeline
External Microcontroller Interface
Microcontroller Data and Address Bus
Channel
Output
(MPEG-2
Transport
Stream)
Descrambler
Reed-
Solomon
Decoder
Convolutional
Deinterleaver
Reed-
Solomon
Synchronizer
Viterbi
Decoder
Viterbi
Synchronizer
L64733/L64734 Tuner and Satellite Receiver Chipset
IOUT
2
3