SYNC
ø
TRIG
T
W
T
W
FIGURE 3. TRIG OUTPUT CONDUCTION ANGLE, Ø
SYNC
CAP
DOZE
4
3
2
BUF
PHASE
LOCK
LOOP
Ø
MEMORY
BUF
DIGITAL
COMPARATOR
OUTPUT
DRIVER
8
TRIG
EXT
6
BUF
CONTROL
LOGIC
Ø
POINTER
SENS
5
BUF
V
SS
V
DD
1
7
(+V)
(-V)
FIGURE 4
LS7231-4 BLOCK DIAGRAM
APPLICATION EXAMPLE:
A typical implementation of a lamp dimmer circuit is shown in Fig. 5. Here the brightness of the lamp is set by touch-
ing the Touch Plate . The functions of different components are as follows:
•
•
The 15V DC supply for the chip is provided by Z, D1, R1, C2 and C5.
R2 and C4 generate the filtered signal for the SYNC input for synchronizing the internal PLL with the line
frequency.
• R3 and C7 act as a filter circuit for the electronic extension. If extensions are not used, the EXT input (Pin 6)
should be tied to V
DD
(Pin 7).
• R4, R5, R6 set up the sensitivity of the SENS input. C6 provides noise filtering.
• C3 is the filter capacitor for the internal PLL.
• R8 provides current limiting and isolation between the chip output and the triac gate.
• C1 and L are RF filter circuits.
In the case of momentary power failure, the circuit state remains unchanged for a period of up to 1 sec. For longer
power interruptions, the output is shut off.
7231-4 040695-5