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The LXT305A serial port is addressed by setting bit A4 in
the Address/Command byte, corresponding to address 16.
The LXT305A contains only a single output data register
so no complex chip addressing scheme is required. The
register is accessed by causing the Chip Select (CS) input
to transition from High to Low. Bit 1 of the serial Address/
Command byte provides Read/Write control when the chip
is accessed. A logic 1 indicates a read operation, and a
logic 0 indicates a write operation. Table 2 lists serial data
output bit combinations for each status. Serial data I/O tim-
ing characteristics are shown in the Test Specifications sec-
tion.
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