®
LY61256
Rev. 1.7
32K X 8 BIT HIGH SPEED CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 1.3
Rev. 1.4
Description
Initial Issue
Delete Icc1/ I
SB
Spec.
Adding Skinny P-DIP
Revised
STSOP Package Outline Dimension
Revised V
TERM
to V
T1
and V
T2
Revised Test Condition of I
SB1
/I
DR
Added LL Spec.
Revised Test Condition of I
CC
Revised
FEATURES
&
ORDERING INFORMATION
Lead free and green package available
to
Green package
available
Deleted T
SOLDER
in
ABSOLUTE MAXIMUN RATINGS
Added packing type in
ORDERING INFORMATION
Revised
PACKAGE OUTLINE DIMENSION
in page 10
Revised
ORDERING INFORMATION
in page 11
Revised
PACKAGE OUTLINE DIMENSION
in page 9
Issue Date
Jul.25.2004
Sep.21.2004
Aug.18.2005
Mar.26.2008
Feb.2.2009
Rev. 1.5
Apr.17.2009
Rev. 1.6
Rev. 1.7
May.7.2010
Aug.25.2010
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0