®
LY6212816
128K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.5
AC TEST CONDITIONS
Input Pulse Levels
0.2V to VCC - 0.2V
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
3ns
1.5V
CL = 30pF + 1TTL, IOH/IOL = -2mA/4mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
SYM.
tRC
UNIT
LY6212816-45
LY6212816-55
LY6212816-70
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
Address Access Time
45
-
-
-
55
-
-
-
70
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAA
45
45
25
-
55
55
30
-
70
70
35
-
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z tOLZ
Chip Disable to Output in High-Z tCHZ
Output Disable to Output in High-Z tOHZ
Output Hold from Address Change tOH
LB#, UB# Access Time
tACE
tOE
tCLZ
-
-
-
*
*
*
*
10
5
-
-
10
-
10
5
-
-
10
-
10
5
-
-
10
-
-
-
-
15
15
-
45
20
-
20
20
-
55
25
-
25
25
-
70
30
-
tBA
LB#, UB# to High-Z Output
LB#, UB# to Low-Z Output
tBHZ
*
-
10
-
10
-
10
tBLZ
*
(2) WRITE CYCLE
PARAMETER
SYM.
tWC
tAW
tCW
tAS
tWP
tWR
tDW
UNIT
LY6212816-45
LY6212816-55
LY6212816-70
MIN.
45
40
40
0
MAX.
MIN.
55
50
50
0
MAX.
MIN.
70
60
60
0
MAX.
Write Cycle Time
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time tDH
Output Active from End of Write
Write to Output in High-Z
-
-
-
35
0
-
-
45
0
-
-
55
0
-
-
20
0
-
-
25
0
-
-
30
0
-
-
tOW
tWHZ
tBW
*
*
5
-
5
-
5
-
-
35
15
-
-
50
20
-
-
60
25
-
LB#, UB# Valid to End of Write
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
5
LYONTEK [ Lyontek Inc. ]
