®
LY622568
Rev. 2.4
256K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 2.0
Rev. 2.1
Description
Initial Issue
Revised I
SB1
/I
DR
/Test Condition of I
CC
Adding PKG type : 32 P-DIP
Revised Test Condition of I
SB1
/I
DR
Adding SL Spec.
Revised
ABSOLUTE MAXIMUN RATINGS
Added I
SB1
/I
DR
values when T
A
= 25
℃
and T
A
= 40
℃
Revised I
SB1 (MAX)
of SL grade
Revised
FEATURES
&
ORDERING INFORMATION
Lead
free and green package available
to
Green package available
Added packing type in
ORDERING INFORMATION
Deleted T
SOLDER
in
ABSOLUTE MAXIMUN RATINGS
Revised -35ns to -45ns Spec.
Revised V
DR
Revised
PACKAGE OUTLINE DIMENSION
in page 8/9/11
Revised
ORDERING INFORMATION
in page 12
Revised
PACKAGE OUTLINE DIMENSION
in page 10
Issue Date
Aug.29.2005
Oct.31.2005
May.14.2007
Jul.26.2007
Mar.30.2009
Rev. 2.2
Rev. 2.3
Rev. 2.4
Sep.11.2009
May.7.2010
Aug.25.2010
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
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