®
LY62256
Rev. 2.9
32K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0.
Rev. 2.0.
Rev. 2.1.
Rev. 2.2
Rev. 2.3
Rev. 2.4
Rev. 2.5
Rev. 2.6
Description
Initial Issue
Revised Vcc Range(Vcc=4.5~5.5V => 2.7~5.5V)
Revised I
SB1
Adding PKG type : skinny P-DIP
Revised V
IH
(min)=2.4V, V
IL
(max)=0.6V
Revised V
IH
(min)=2.4V, V
IL
(max)=0.6V (V
CC
=2.7~3.6V)
V
IH
(min)=2.4V, V
IL
(max)=0.8V (V
CC
=4.5~5.5V)
Revised
STSOP Package Outline Dimension
Added SL grade
Added I
SB1
/I
DR
values when T
A
= 25
℃
and T
A
= 40
℃
Revised
FEATURES
&
ORDERING INFORMATION
Lead
free and green package available
to
Green package available
Added packing type in
ORDERING INFORMATION
Revised I
SB1(MAX)
Revised V
TERM
to V
T1
and V
T2
Revised Test Condition of I
SB1
/I
DR
Deleted T
SOLDER
in
ABSOLUTE MAXIMUN RATINGS
Revised
PACKAGE OUTLINE DIMENSION
in page 8 & 9
Revised
PACKAGE OUTLINE DIMENSION
in page 10
Revised
ORDERING INFORMATION
in page 12
Revised
PACKAGE OUTLINE DIMENSION
in page 9
Issue Date
Jul.25.2004
May.4.2005
May.13.2005
Aug.29.2005
Feb.24.2006
Jul.31.2006
Mar.26.2008
Mar.30.2009
Rev. 2.7
Rev. 2.8
Rev. 2.9
Dec.18.2009
May.7.2010
Aug.25.2010
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
0