®
LY62256
32K X 8 BIT LOW POWER CMOS SRAM
Rev. 2.9
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
SYMBOL
TEST CONDITION
CE# ≧ VCC - 0.2V
MIN.
1.5
-
TYP. MAX. UNIT
VDR
-
5.5
20
V
LL/LLE/LLI
0.5
A
µ
SL
℃
-
-
0.5
1
2
3
A
A
25
µ
VCC = 1.5V
CE# ≧ VCC - 0.2V
Others at 0.2V or VCC-0.2V
SLE
SLI
SL
Data Retention Current
IDR
℃
40
µ
-
-
0.5
0.5
8
15
A
µ
A
µ
SLE/SLI
Chip Disable to Data
Retention Time
Recovery Time
See Data Retention
Waveforms (below)
tCDR
tR
0
-
-
-
-
ns
ns
tRC
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
VDR ≧ 1.5V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
VIH
CE# ≧ Vcc-0.2V
VIH
CE#
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
7
LYONTEK [ Lyontek Inc. ]
