®
LY62W1024
Rev. 1.4
128K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 1.3
Rev. 1.4
Description
Initial Issue
Revised I
SB1
LL/LLI-LLE(max)= 50/100
μA
=> 20/50
μA
I
DR
LL/LLI-LLE(max)= 20/40
μA
=> 12/30
μA
Added SL Spec.
Revised typos in
FEATURES
Revised I
SB1
/I
DR(MAX.)
Added I
SB1
/I
DR
values when T
A
= 25
℃
and T
A
= 40
℃
Revised
FEATURES
&
ORDERING INFORMATION
Lead free and green package available
to
Green package
available
Added packing type in
ORDERING INFORMATION
Revised V
TERM
to V
T1
and V
T2
Deleted T
SOLDER
in
ABSOLUTE MAXIMUN RATINGS
Issue Date
Aug.28.2005
Mar.30.2006
Nov.2.2007
May.6.2008
Mar.30.2009
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
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