TB62706BNG 参数 Datasheet PDF下载

TB62706BNG/BFG

BLOCK DIAGRAM

TIMING DIAGRAM

Note:

Latches are level sensitive, not rising edges sensitive and not syncronus CLOCK.

Input of LATCH- terminal to H Level, data passes latches, and input to L level, data hold latches.

Input of ENABLE- terminal to H level, all output (OUT0~15) do off.

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2004-06-24