TB62725BPG/BFG/BFNG
Application Circuit (example 3): When the condition of V
LED
is V
f
+
0.7
<
V
LED
<
17 V.
V
OUT
=
V
LED
-
V
f
=
0.7 to 1.0 V is the most suitable for V
OUT
.
Surplus V
OUT
causes an IC fever and the useless consumption electric power.
It is the one way of being effective to build in the r3 in this problem.
r3 can make a calculation to the formula r3 (ohms)
=
surplus V
OUT
/I
OUT
.
Though the resistance parts increase, the fixed constant current performance is kept.
Example)
TD62M8600: 8bit multichip PNP transistor array,
which is not used in static lighting system.
r3
r3
V
LED
=
15 V
SCAN
O1
SERIALIN
C.U.
ENABLE
LATCH
CLOCK
O2
O5
O6
O7
SERIALOUT
SERIALIN
ENABLE
LATCH
O1 O2
O5 O6 O7
SERIALOUT
8bit SIPO, Latches and
Constantsinkcurrent drivers
8bit SIPO, Latches and
Constantsinkcurrent drivers
TB62725BPG/BFG/BFNG
CLOCK
TB62725BPG/BFG/BFNG
r2
r1
=
100
W
12
r1
=
100
W
20050420