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88PG8237A1-NFE1C000 参数 Datasheet PDF下载

88PG8237A1-NFE1C000图片预览
型号: 88PG8237A1-NFE1C000
PDF下载: 下载PDF文件 查看货源
内容描述: 现场可编程DSP切换™现场可编程DSP切换™ AnyVoltage ™技术 [Field Programmable DSP Switcher™ Field Programmable DSP Switcher™ AnyVoltage™ Technology]
分类和应用:
文件页数/大小: 62 页 / 2348 K
品牌: MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
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88PG82XX  
Datasheet  
Table 3: Pin Descriptions  
Pin #  
Pin Name  
Pin Type  
Pin Description  
14  
VSET2  
I
Voltage Set for Regulator 2.  
1. Resistor Programming: Connect an external resistor to ground to set the  
output voltage of the switching regulator. See the “Electrical  
Characteristics” for resistor values and Output Voltage Settings. Use  
resistor values with a tolerance of 5% or better. The total capacitance  
across this pin and GND should be equal to 25 pF or less.  
2. Logic Programming: Four output voltage levels (0.8V, 1.0V, 1.2V, and 1.5V)  
can be set by connecting the VSET and PSET pins to either GND or SVIN.  
15  
PSET2  
I
Percent Set for Regulator 2.  
1. Resistor Programming: Connect an external resistor to ground to set the  
output voltage of the switching regulator. See the “Electrical  
Characteristics” for resistor values and Output Voltage Settings. Use  
resistor values with a tolerance of 5% or better. The total capacitance  
across this pin and GND should be equal to 25 pF or less. If the pin is not  
used, it must be connected to GND.  
2. Logic Programming: Four output voltage levels (0.8V, 1.0V, 1.2V, and 1.5V)  
can be set by connecting the VSET and PSET pins to either GND or SVIN.  
16  
17  
POR2  
PVIN2  
O
S
Power-On Reset 2.  
This pin is an open drain output to indicate the status of the output voltage. The  
output pin goes high 40 ms after the output voltage is within the specified  
tolerance.  
POR2 and POR1 can be connected to the same external pull up resistor to  
indicate “both output good”.  
Power Input Voltage for regulator 2: Internal power MOSFET source. Connect  
the 10 µF decoupling capacitor between PVIN2 and PGND2 and position it as  
close as possible to the IC.  
NOTE: PVIN and PVIN2 must be connected together and should not be  
separated.  
19  
PGND2  
SW2  
GND  
O
Power Ground for regulator 2: The power ground must be connected to the  
negative terminal of the input and output capacitors.  
18, 20  
Switch Node for regulator 2: Internal power MOSFET drain. Connects to an  
external inductor.  
Doc. No. MV-S103563-00 Rev. C  
Page 14  
Copyright © 2008 Marvell  
Document Classification: Proprietary Information  
April 23, 2008, 2.00