DA1016.003
31 October, 2000
PACKAGE FOR SAMPLES
PDIP 20
NC
1
20 VSS
19 NC
18 RFI
17 PDN
16 AON
15 DEC
14 NC
13 NC
12 NC
11 NC
VDD 2
NC
QO
NC
QI
3
4
5
6
AGC 7
OUT 8
NC
9
NC 10
PIN DESCRIPTION
Pin Name
NC
VDD
NC
QO
NC
QI
AGC
OUT
NC
NC
NC
NC
NC
NC
DEC
AON
PDN
RFI
NC
VSS
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Type
P
AO
AI
AO
DO
Function
Positive Power Supply
Quartz Filter Output
Quartz Filter Input
AGC Capacitor
Receiver Output
Note
3
AO
DI
AI
AI
G
Demodulator Capacitor
AGC On Control
Power Down Input
Receiver Input
Power Supply Ground
2
1
Notes:
1) Level = VSS means receiver on; VDD = receiver off
2) Level = VDD means receiver on; VSS = receiver off (PDN = VDD)
Internal pull-down resistor > 1MOhm to VSS
3) 100 % AM results in Level = VSS; 25 % AM results in Level = VDD
- the output is a current source/sink with
[lout]
>5
µA
- at power down the output is tri-state
5 (6)