Precision, Quad, SPDT, CMOS Analog Switch
______________________________________________Test Circuits/Timing Diagrams
MAX333A
+15V
C
C
+15V
COM_
V+
COM_
V+
CAPACITANCE
METER
IN_
NO_
OR NC_
GND
V-
0V, 2.4V
CAPACITANCE
METER
C
NO
OR NC
GND
V-
IN_
0V,
2.4V
C
-15V
-15V
Figure 3. Channel-Off Capacitance
Figure 4. Channel-On Capacitance
+15V
LOGIC
INPUT
+3V
50%
0V
VCOM
VO1
0.9VO
LOGIC
INPUT
V
COM
COM_
NC
IN_
GND
V-
V+
NO
VO2
RL2
RL1
VO1
CL1
0V
SWITCH
OUTPUT VCOM
VO2
SWITCH
OUTPUT
0V
tD
tD
0.9VO
CL2
-15V
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
LOGIC 0 INPUT.
R L = 1000Ω
C L = 35pF
Figure 5. Break-Before-Make
+15V
V+
R GEN
COM_
NC OR NO
CL
10nF
VO
VO
IN_
∆V
O
V GEN
GND
IN_
V-
ON
OFF
ON
-15V
Q = (∆V O )(C L )
Figure 6. Charge Injection
6
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
