4 Megabit (512K x 8-Bit) SRAM
T
ABLE
5. 32408B F
UNCTIONAL
D
ESCRIPTION 1
CS
H
L
L
L
1. X = don’t care.
WE
X
H
H
L
OE
X
H
L
X
M
ODE
Not Select
Output Disable
Read
Write
I/O P
IN
High-Z
High-Z
D
OUT
D
IN
32C408B
S
UPPLY
C
URRENT
I
SB
, I
SB1
I
CC
I
CC
I
CC
T
ABLE
6. 32C408B AC C
HARACTERISTICS FOR
W
RITE
C
YCLE
P
ARAMETER
Write Cycle Time
-20
-25
-30
Chip Select to End of Write
-20
-25
-30
Address Setup Time
-20
-25
-30
Address Valid to End of Write
-20
-25
-30
Write Pulse Width (OE High)
-20
-25
-30
Write Recovery Time
-20
-25
-30
Write to Output in High-Z
1
-20
-25
-30
Data to Write Time Overlap
-20
-25
-30
S
YMBOL
t
WC
M
IN
20
25
30
14
15
17
0
0
0
14
15
17
14
15
17
0
0
0
0
0
0
8
9
10
T
YP
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
5
5
6
--
--
--
M
AX
--
--
--
ns
--
--
--
ns
--
--
--
ns
--
--
--
ns
--
--
--
ns
--
--
--
ns
10
10
12
ns
--
--
--
U
NIT
ns
Memory
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
1000559
12.19.01 Rev 6
All data sheets are subject to change without notice
4
©2001 Maxwell Technologies
All rights reserved.
MAXWELL [ MAXWELL TECHNOLOGIES ]
