TABLE I. Electrical performance characteristics - Continued.
|
|Symbol
|
|
|
|
|tDFR
|
|
|
|tRR
|
|
|tRP
|
|
|tRES
|
|
|tDB
|
|
|
Conditions
| -55
(
C
TC
+125
(
C
| VSS = 0 V; 4.5 V
VCC
5.5 V
| unless otherwise specified
|
|See figures 4, 5, and 6 as
| applicable. 5/ 8/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| Group A
|subgroups
|
|
|
|9, 10, 11
|
|
|
|9, 10, 11
|
|
|9, 10, 11
|
|
|9, 10, 11
|
|
|9, 10, 11
|
|
| Device
| types
|
|
|
| 16-19
|
|
|
| 16-19
|
|
| 16-19
|
|
| 16-19
|
|
| 16-19
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| Unit
|
|
|
|
| ns
|
|
|
| ns
|
|
| µs
|
|
| µs
|
|
| ns
|
Test
RE S low to output float
RE S to output delay
Reset protect time
Reset high time
Time to device busy
Limits
|
Min | Max
|
|
0
| 350
|
|
|
0
| 450
|
|
100 |
|
|
1.0
|
|
|
120 |
|
1/ Connect all address inputs and OE to VIH and measure IOZL and IOZH with the output under test connected to VOUT.
Terminal conditions for the output leakage current test shall be as follows:
a. VIH = 2.0 V for device types 01-15 and 2.2 V for device types 16-19; VIL = 0.8 V.
b. For IOZL: Select an appropriate address to acquire a logic "1" on the designated output. Apply VIH to C
.
E
Measure the leakage current while applying the specified voltage.
c. For IOZH: Select an appropriate address to acquire a logic "0" on the designated output. Apply VIH to C
.
E
Measure the leakage current while applying the specified voltage.
2/ A functional test shall verify the dc input and output levels and applicable patterns as appropriate, all input
and I/O pins shall be tested. Terminal conditions are as follows:
a. Inputs: H =2.0 V for device types 01-15 and 2.2 V for device types 16-19; L = 0.8 V. Outputs: H = 2.4 V minimum and
L = 0.4 V maximum.
b. The functional tests shall be performed with VCC = 4.5 and VCC = 5.5 V.
3/ All pins not being tested are to be open.
4/ Tested initially and after any design or process changes which may affect that parameter, and therefore shall be
guaranteed to the limits specified in table I.
5/ Tested by application of specified timing signals and conditions.
Equivalent ac test conditions:
Output load, see figure 5; input rise and fall times
10 ns; input pulse levels, 0.4 V and 2.4 V; timing measurement
reference levels, inputs, 1.5 V for device types 1-15 and 1 V and 2 V for device types 16-19; outputs, 1.5 V for device types
1-15 and 0.8 V and 2 V for device types 16-19.
6/ Chip erase functions are applicable to device types 01-15 only.
7/ This parameter not applicable for internal timer controlled devices.
8/
functions are applicable to device types 16-19 only.
RE S
SIZE
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
A
REVISION LEVEL
G
5962-38267
SHEET
12