Programmable Skew Clock Buffer (PSCB)
F
IGURE
1. TTL AC T
EST
L
OAD
7B991
F
IGURE
2. TTL I
NPUT
T
EST
W
AVEFORM
Memory
T
ABLE
7. AC E
LECTRICAL
C
HARACTERISTICS
P
ARAMETER
Operating Clock Frequency in MHz
FS = LOW
1,2,3
(V
CC
= 5V ±10%, T
A
= -40
TO
85°C,
UNLESS OTHERWISE SPECIFIED
)
S
YMBOL
f
NOM
S
UBGROUPS
9, 10, 11
M
IN
15
25
40
t
RPWH
t
RPWL
t
U
t
SKEWPR
t
SKEW0
t
SKEW1
t
SKEW2
t
SKEW3
t
SKEW4
t
DEV
t
PD
t
ODCV
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
--
--
--
--
--
--
--
-1
-1.2
5.0
5.0
T
YP
--
--
--
--
--
0.1
0.3
0.6
1.0
0.7
1.2
--
0.0
0.0
M
AX
30
50
80
--
--
0.50
0.75
1.0
1.5
1.2
1.7
1.65
1
1.2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
U
NIT
MHz
FS = MID
1,4
FS = HIGH
1,4,5
REF Pulse Width HIGH
REF Pulse Width LOW
Programmable Skew Unit
Zero Output Matched-Pair Skew (XQ0, XQ1)
6,7
Zero Output Skew (All Outputs)
6,8,9
Output Skew (Rise-Rise, Fall-Fall, Same Class Out-
puts)
6,10
Output Skew (Rise-Fall, Nominal-Inverted, Divided-
Divided)
6,10
Output Skew (Rise-Rise, Fall-Fall, Different Class
Outputs)
6,10
Output Skew (Rise-Fall, Nominal-Divided, Divided-
Inverted)
Device-to-Device Skew
1,11,12
Propagation Delay, REF Rise to FB Rise
Output Duty Cycle Variation
13
See Table 2
09.23.02 Rev 4
All data sheets are subject to change without notice
5
©2002 Maxwell Technologies.
All rights reserved.
MAXWELL [ MAXWELL TECHNOLOGIES ]
