MX23L6411
64M-BIT (8M x 8 / 4M x 16) Mask ROM with Page Mode
FEATURES
• Bit organization
- 8M x 8 (byte mode)
- 4M x 16 (word mode)
• Fast access time
- Random access: 100ns (max.)
- Page access: 30ns (max.)
• Page Size
- 8 words per page
• Current
- Operating: 50mA
- Standby: 15uA (max.)
• Supply voltage
- 2.7V~3.6V
• Package
- 44 pin SOP (500 mil)
- 48 pin TSOP (12mm x 20mm)
ORDER INFORMATION
Part No.
Access Page Access Package
Time
MX23L6411MC-12 120ns
MX23L6411TC-12 120ns
MX23L6411RC-12 120ns
MX23L6411MC-10 100ns
MX23L6411TC-10 100ns
MX23L6411RC-10 100ns
Time
50ns
50ns
50ns
30ns
30ns
30ns
44 pin SOP
48 pin TSOP
48 pin TSOP
(Reverse type)
44 pin SOP
48 pin TSOP
48 pin TSOP
(Reverse type)
PIN DESCRIPTION
PIN CONFIGURATION
44 SOP
A21
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
VSS
OE
D0
D8
D1
D9
D2
D10
D3
D11
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A20
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
Symbol
A0~A21
D0~D14
D15/A-1
CE
OE
Byte
VCC
VSS
NC
MX23L6411
Pin Function
Address Inputs
Data Outputs
D15 (Word Mode) / LSB Address (Byte
Mode)
Chip Enable Input
Output Enable Input
Word / Byte Mode Selection
Power Supply Pin
Ground Pin
No Connection
MODE SELECTION
CE OE Byte D15/A-1 D0~D7 D8~D15 Mode
H
L
L
L
X
H
L
L
X
X
H
L
X
X
Input
High Z
High Z
D0~D7
High Z
High Z
High Z
-
-
Byte
Power
Stand-by
Active
Active
Active
Output D0~D7 D8~D15 Word
P/N:PM0407
REV. 3.0, NOV. 22, 2002
1
MCNIX [ MACRONIX INTERNATIONAL ]
