MX25L8005
Table 2. COMMAND DEFINITION
COMMAND WREN
(byte)
1st
2nd
3rd
4th
5th
Action
sets the
(WEL)
write
enable
latch bit
COMMAND SE
(byte)
(Sector
Erase)
20 Hex
AD1
AD2
AD3
reset the output the
(WEL)
write
enable
latch bit
BE
(Block
Erase)
52 or
D8 Hex
AD1
AD2
AD3
CE
(Chip
Erase)
60 or
C7 Hex
PP
(Page
Program)
02 Hex
AD1
AD2
AD3
DP
(Deep
Power
Down)
B9 Hex
RDP
(Release
from Deep
Power-down)
AB Hex
to read out
to write new
values to the
(write
Enable)
06 Hex
WRDI
(write
disable)
04 Hex
RDID
(read ident-
ification)
9F Hex
RDSR
(read status
register)
05 Hex
WRSR
(write status
register)
01 Hex
READ
(read data)
03 Hex
AD1
AD2
AD3
n bytes
read out
Fast Read
(fast read
data)
0B Hex
AD1
AD2
AD3
x
manufacturer the status
ID and 2-byte register
device ID
status register until
CS# goes
high
RES
(Read
Electronic
ID)
AB Hex
x
x
x
REMS (Read
Electronic
Manufacturer
& Device ID)
90 Hex
x
x
ADD(1)
Output the
manufacturer
ID and device
ID
1st
2nd
3rd
4th
5th
Action
(1) ADD=00H will output the manufacturer's ID first and ADD=01H will output device ID first.
(2) It is not recommended to adopt any other code which is not in the above command definition table.
P/N: PM1237
7
REV. 2.2, OCT. 23, 2008
MCNIX [ MACRONIX INTERNATIONAL ]
