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MX25V8035MI-15G 参数 Datasheet PDF下载

MX25V8035MI-15G图片预览
型号: MX25V8035MI-15G
PDF下载: 下载PDF文件 查看货源
内容描述: 4M- BIT [ ×1 / ×2 / ×4 ] 2.5V的CMOS串行闪存 [4M-BIT [x 1/x 2/x 4] 2.5V CMOS SERIAL FLASH]
分类和应用: 闪存
文件页数/大小: 54 页 / 2264 K
品牌: MCNIX [ MACRONIX INTERNATIONAL ]
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MX25V4035
MX25V8035
ERASE AND PROGRAMMING PERFORMANCE
PARAMETER
Write Status Register Cycle Time
Sector Erase Cycle Time (4KB)
Block Erase Cycle Time (32KB)
Block Erase Cycle Time (64KB)
Chip Erase Cycle Time
Byte Program Time (via page program command)
Page Program Cycle Time
Erase/Program Cycle
100,000
4M
8M
80
0.6
1
7.5
13
15
1.7
Min.
TYP. (1)
Max. (2)
200
160
1.2
2
13
22
300
6
UNIT
ms
ms
s
s
s
s
us
ms
cycles
Note:
1. Typical program and erase time assumes the following conditions: 25°C, 2.5V, and checker board pattern.
2. Under worst conditions of 85°C and 2.25V.
3. System-level overhead is the time required to execute the first-bus-cycle sequence for the programming com-
mand.
4. The maximum chip programming time is evaluated under the worst conditions of 85°C, VCC=2.5V, and 100K cy-
cle with 90% confidence level.
LATCH-UP CHARACTERISTICS
MIN.
Input Voltage with respect to GND on all power pins, SI, CS#
Input Voltage with respect to GND on SO
Current
Includes all pins except VCC. Test conditions: VCC = 2.5V, one pin at a time.
-1.0V
-1.0V
-100mA
MAX.
2 VCCmax
VCC + 1.0V
+100mA
P/N: PM1468
48
REV. 0.01, FEB. 13, 2009