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MX26LV040QC-70 参数 Datasheet PDF下载

MX26LV040QC-70图片预览
型号: MX26LV040QC-70
PDF下载: 下载PDF文件 查看货源
内容描述: 4M- BIT [ 512K ×8 ] CMOS单电压3V ONLY高速eLiteFlashTM记忆 [4M-BIT [512K x 8] CMOS SINGLE VOLTAGE 3V ONLY HIGH SPEED eLiteFlashTM MEMORY]
分类和应用:
文件页数/大小: 40 页 / 588 K
品牌: MCNIX [ MACRONIX INTERNATIONAL ]
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MX26LV040
Macronix NBit
TM
Memory Family
4M-BIT [512K x 8] CMOS SINGLE VOLTAGE
3V ONLY HIGH SPEED eLiteFlash
TM
MEMORY
FEATURES
• Extended single - supply voltage range 3.0V to 3.6V
• 524,288 x 8
• Single power supply operation
- 3.0V only operation for read, erase and program
operation
• Fast access time: 55/70ns
• Low power consumption
- 30mA maximum active current
- 30uA typical standby current
• Command register architecture
- Byte Programming (55us typical)
- Sector Erase (Sector structure 64K-Byte x8)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
• Status Reply
- Data# polling & Toggle bit for detection of program
and erase operation completion.
• 2,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Package type:
- 32-pin PLCC
- 32-pin TSOP
- 32-pin PDIP
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
• 20 years data retention
GENERAL DESCRIPTION
The MX26LV040 is a 4-mega bit Flash memory orga-
nized as 512K bytes of 8 bits. MXIC's Flash memories
offer the most cost-effective and reliable read/write non-
volatile random access memory. The MX26LV040 is pack-
aged in 32-pin PLCC, 32-pin TSOP and 32-pin PDIP. It
is designed to be reprogrammed and erased in system
or in standard EPROM programmers.
The standard MX26LV040 offers access time as fast as
55ns, allowing operation of high-speed microprocessors
without wait states. To eliminate bus contention, the
MX26LV040 has separate chip enable (CE#) and output
enable (OE#) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX26LV040 uses a command register to manage this
functionality. The command register allows for 100% TTL
level control inputs and fixed power supply levels during
erase and programming, while maintaining maximum
EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 2,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX26LV040 uses a 3.0V~3.6V VCC supply
to perform the High Reliability Erase and auto Program/
Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
P/N:PM1118
REV. 1.0, NOV. 08, 2004
1