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MX26LV400BTC-70 参数 Datasheet PDF下载

MX26LV400BTC-70图片预览
型号: MX26LV400BTC-70
PDF下载: 下载PDF文件 查看货源
内容描述: 4M- BIT [ 512Kx8 / 256Kx16 ] CMOS单电压3V只引导扇区高速eLiteFlashTM记忆 [4M-BIT [512Kx8/256Kx16] CMOS SINGLE VOLTAGE 3V ONLY BOOT SECTOR HIGH SPEED eLiteFlashTM MEMORY]
分类和应用:
文件页数/大小: 46 页 / 550 K
品牌: MCNIX [ MACRONIX INTERNATIONAL ]
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MX26LV400
Macronix NBit
TM
Memory Family
4M-BIT [512Kx8/256Kx16] CMOS SINGLE VOLTAGE
3V ONLY BOOT SECTOR HIGH SPEED eLiteFlash
TM
MEMORY
FEATURES
• Extended single - supply voltage range 3.0V to 3.6V
• 524,288 x 8/262,144 x 16 switchable
• Single power supply operation
- 3.0V only operation for read, erase and program
operation
• Fast access time: 55/70ns
• Low power consumption
- 30mA maximum active current
- 30uA typical standby current
• Command register architecture
- Byte/word Programming (typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x7)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase verify capability.
- Automatically program and verify data at specified
address
• Status Reply
- Data# polling & Toggle bit for detection of program
and erase operation completion.
• Ready/Busy# pin (RY/BY#)
- Provides a hardware method of detecting program or
erase operation completion.
• 2,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Package type:
- 48-pin TSOP
- 48-ball CSP
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
• 20 years data retention
GENERAL DESCRIPTION
The MX26LV400 is a 4-mega bit high speed Flash memory
organized as 512K bytes of 8 bits or 256K words of 16
bits. MXIC's high speed Flash memories offer the most
cost-effective and reliable read/write non-volatile random
access memory. The MX26LV400 is packaged in 48-pin
TSOP, and 48-ball CSP. It is designed to be repro-
grammed and erased in system or in standard EPROM
programmers.
The standard MX26LV400 offers access time as fast as
55ns, allowing operation of high-speed microprocessors
without wait states. To eliminate bus contention, the
MX26LV400 has separate chip enable (CE#) and output
enable (OE#) controls.
MXIC's high speed Flash memories augment EPROM
functionality with in-circuit electrical erasure and program-
ming. The MX26LV400 uses a command register to
manage this functionality. The command register allows
for 100% TTL level control inputs and fixed power sup-
ply levels during erase and programming, while main-
taining maximum EPROM compatibility.
MXIC high speed Flash technology reliably stores
memory contents even after 2,000 erase and program
cycles. The MXIC cell is designed to optimize the erase
and programming mechanisms. In addition, the combi-
nation of advanced tunnel oxide processing and low in-
ternal electric fields for erase and program operations
produces reliable cycling. The MX26LV400 uses a
3.0V~3.6V VCC supply to perform the High Reliability
Erase and auto Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamperes on
address and data pin from -1V to VCC + 1V.
P/N:PM1094
REV. 1.0, NOV. 08, 2004
1