PRELIMINARY
MX29F080
8M-BIT [1024K x 8] CMOS EQUAL SECTOR FLASH MEMORY
FEATURES
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1,048,576 x 8 byte mode only stuction
Single power supply operation
- 5.0V only operation for read, erase and program
operation
Fast access time: 70/90/120ns
Low power consumption
- 30mA maximum active current
- 0.2uA typical standby current
Command register architecture
- Byte Programming (7us typical)
- Sector Erase of 16 equal sector with 64K-Byte each
Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, another sector that is not being
erased, then resumes the erase.
Status Reply
- Data polling & Toggle bit for detection of program
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and erase operation completion.
Ready/Busy (RY/BY)
- Provides a hardware methed of detecting program
and erase operation complation.
Sector Group protect/chip unprotect for 5V/12V sys-
tem.
Sector Group protection
- Hardware protect method for each group which con-
sists of two adjacent sectors
- Temporary sector group unprotect allows code
changes in previously locked sectors
10,000 minimum erase/program cycles
Latch-up protected to 100mA from -1V to VCC+1V
Low VCC write inhibit is equal to or less than 3.2V
Package type:
- 40-pin TSOP or 44-pin SOP
Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
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GENERAL DESCRIPTION
The MX29F080 is a 8-mega bit Flash memory organized
as 1024K bytes of 8 bits. MXIC's Flash memories offer
the most cost-effective and reliable read/write non-vola-
tile random access memory. The MX29F080 is pack-
aged in 40-pin TSOP or 44-pin SOP. It is designed to be
reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29F080 offers access time as fast as
70ns, allowing operation of high-speed microprocessors
without wait states. To eliminate bus contention, the
MX29F080 has separate chip enable (CE) and output
enable (OE ) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29F080 uses a command register to manage this
functionality. The command register allows for 100%
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory
contents even after 10,000 erase and program
cycles. The MXIC cell is designed to optimize the
erase and program mechanisms. In addition, the
combination of advanced tunnel oxide processing
and low internal electric fields for erase and
programming operations produces reliable cycling.
The MX29F080 uses a 5.0V±10% VCC supply to
perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is
achieved with MXIC's proprietary non-epi process.
Latch-up protection is proved for stresses up to 100
milliamps on address and data pin from -1V to VCC
+ 1V.
P/N:PM0579
REV. 1.4, JAN, 16, 2002
1
MCNIX [ MACRONIX INTERNATIONAL ]
