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MX29F400CTMI-70G 参数 Datasheet PDF下载

MX29F400CTMI-70G图片预览
型号: MX29F400CTMI-70G
PDF下载: 下载PDF文件 查看货源
内容描述: 4M- BIT [ 512Kx8 / 256Kx16 ] CMOS单电压只有5V引导扇区闪存 [4M-BIT [512Kx8/256Kx16] CMOS SINGLE VOLTAGE 5V ONLY BOOT SECTOR FLASH MEMORY]
分类和应用: 闪存
文件页数/大小: 42 页 / 443 K
品牌: MCNIX [ MACRONIX INTERNATIONAL ]
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MX29F400C T/B
4M-BIT [512Kx8/256Kx16] CMOS SINGLE VOLTAGE
5V ONLY BOOT SECTOR FLASH MEMORY
FEATURES
• 524,288 x 8/262,144 x 16 switchable
• Single power supply operation
- 5.0V only operation for read, erase and program
operation
• Fast access time: 55/70/90ns
• Compatible with MX29F400T/B device
• Low power consumption
- 40mA maximum active current(5MHz)
- 1uA typical standby current
• Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Bytex1, 8K-
Bytex2, 32K-Bytex1, and 64K-Byte x7)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
• Erase suspend/Erase Resume
- Suspends an erase operation to read data from, or
program data to, another sector that is not being
erased, then resumes the erase
• Status Reply
- Data# Polling & Toggle bit for detection of program
and erase cycle completion
• Ready/Busy pin (RY/BY#)
- Provides a hardware method of detecting program or
erase cycle completion
• Sector protect/chip unprotect for 5V only system
• Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotect allows code changes in
previously locked sectors
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Code Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Low VCC write inhibit is equal to or less than 3.2V
• Package type:
- 44-pin SOP
- 48-pin TSOP
-
All Pb-free devices are RoHS Compliant
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
• 20 years data retention
GENERAL DESCRIPTION
The MX29F400C T/B is a 4-mega bit Flash memory or-
ganized as 512K bytes of 8 bits or 256K words of 16 bits.
MXIC's Flash memories offer the most cost-effective and
reliable read/write non-volatile random access memory.
The MX29F400C T/B is packaged in 44-pin SOP, 48-pin
TSOP. It is designed to be reprogrammed and erased in
system or in standard EPROM programmers.
The standard MX29F400C T/B offers access time as
fast as 55ns, allowing operation of high-speed micropro-
cessors without wait states. To eliminate bus conten-
tion, the MX29F400C T/B has separate chip enable (CE#)
and output enable (OE#) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29F400C T/B uses a command register to manage
this functionality. The command register allows for 100%
TTL level control inputs and fixed power supply levels
P/N:PM1200
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29F400C T/B uses a 5.0V±10% VCC sup-
ply to perform the High Reliability Erase and auto Pro-
gram/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
REV. 1.0, DEC. 20, 2005
1