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MX29LV320CBXBC-70G 参数 Datasheet PDF下载

MX29LV320CBXBC-70G图片预览
型号: MX29LV320CBXBC-70G
PDF下载: 下载PDF文件 查看货源
内容描述: 32M - BIT [ 4M ×8 / 2M ×16 ]单电压3V仅限于Flash存储器 [32M-BIT [4M x 8 / 2M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY]
分类和应用: 闪存存储内存集成电路
文件页数/大小: 62 页 / 770 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX29LV320C T/B  
TABLE 3. MX29LV320CT/B COMMAND DEFINITIONS  
First Bus  
Cycle  
Second Bus Third Bus  
Cycle Cycle  
Fourth Bus  
Cycle  
Fifth Bus Sixth Bus  
Cycle Cycle  
Command  
Bus  
Cycles Addr Data Addr Data Addr Data Addr  
Data Addr Data Addr Data  
Read(Note 5)  
1
1
RA  
RD  
Reset(Note 4)  
XXX F0  
Automatic Select(Note 5)  
Manufacturer ID  
Word  
Byte  
4
4
4
4
4
4
4
4
3
3
4
4
4
4
6
6
6
6
1
1
1
1
555 AA  
AAA AA  
555 AA  
AAA AA  
555 AA  
AAA AA  
555 AA  
AAA AA  
555 AA  
AAA AA  
555 AA  
AAA AA  
555 AA  
AAA AA  
555 AA  
AAA AA  
555 AA  
AAA AA  
2AA 55  
555 55  
2AA 55  
555 55  
2AA 55  
555 55  
2AA 55  
555 55  
2AA 55  
555 55  
2AA 55  
555 55  
2AA 55  
555 55  
2AA 55  
555 55  
2AA 55  
555 55  
555 90  
AAA 90  
555 90  
AAA 90  
555 90  
AAA 90  
555 90  
AAA 90  
555 88  
AAA 88  
555 90  
AAA 90  
555 A0  
AAA A0  
555 80  
AAA 80  
555 80  
AAA 80  
X00  
X00  
X01  
X02  
X03  
X06  
C2H  
C2H  
ID  
Device ID  
Word  
Byte  
Security Sector Factory Word  
Protect Verify (Note 6) Byte  
Sector Protect Verify Word  
99/19  
(SA)X02 00/01  
(SA)X04  
(Note 7)  
Byte  
Word  
Byte  
Word  
Byte  
Word  
Byte  
Word  
Byte  
Word  
Byte  
Word  
Byte  
Enter Security Sector  
Region  
Exit Security Sector  
XXX  
XXX  
PA  
00  
00  
Program  
PD  
PD  
AA  
AA  
AA  
AA  
PA  
Chip Erase  
555  
AAA  
555  
AAA  
2AA 55 555 10  
555 55 AAA 10  
2AA 55 SA 30  
555 55 SA 30  
Sector Erase  
CFI Query (Note 8)  
55  
98  
98  
B0  
30  
AA  
SA  
SA  
Erase Suspend(Note 9)  
Erase Resume(Note 10)  
Legend:  
X=Don't care  
RA=Address of the memory location to be read.  
PD=Data to be programmed at location PA. Data is latched on  
the rising edge of WE# or CE# pulse.  
RD=Data read from location RA during read operation.  
PA=Address of the memory location to be programmed.  
Addresses are latched on the falling edge of the WE# or CE#  
pulse.  
SA=Address of the sector to be erased or verified. Address  
bits A20-A12 uniquely select any sector.  
ID=22A7h(Top), 22A8h(Bottom)  
Notes:  
1. See Table 1 for descriptions of bus operations.  
2. All values are in hexadecimal.  
3. Except when reading array or Automatic Select data, all bus cycles are write operation.  
4. The Reset command is required to return to the read mode when the device is in the Automatic Select mode or if Q5 goes  
high.  
5. The fourth cycle of the Automatic Select command sequence is a read cycle.  
6. The data is 99h for factory locked and 19h for not factory locked.  
7. The data is 00h for an unprotected sector/sector block and 01h for a protected sector/sector block. In the third cycle of the  
command sequence, address bit A20=0 to verify sectors 0~31, A20=1 to verify sectors 32~70 for Top Boot device.  
8. Command is valid when device is ready to read array data or when device is in Automatic Select mode.  
9. The system may read and program functions in non-erasing sectors, or enter the Automatic Select mode, when in the erase  
Suspend mode. The Erase Suspend command is valid only during a sector erase operation.  
10. The Erase Resume command is valid only during the Erase Suspend mode.  
P/N:PM1188  
REV. 1.0, AUG. 02, 2005  
16