1Gb: x4, x8, x16 DDR3 SDRAM
Electrical Specifications – DC and AC
Slew Rate Definitions for Single-Ended Input Signals
Setup (
t
IS and
t
DS) nominal slew rate for a rising signal is defined as the slew rate
between the last crossing of V
REF
and the first crossing of V
IH
(
AC
) MIN. Setup (
t
IS and
t
DS) nominal slew rate for a falling signal is defined as the slew rate between the last
crossing of V
REF
and the first crossing of V
IL
(
AC
) MAX (see Figure 22 on page 47).
Hold (
t
IH and
t
DH) nominal slew rate for a rising signal is defined as the slew rate
between the last crossing of V
IL
(
DC
) MAX and the first crossing of V
REF
. Hold (
t
IH and
t
DH) nominal slew rate for a falling signal is defined as the slew rate between the last
crossing of V
IH
(
DC
) MIN and the first crossing of V
REF
(see Figure 22 on page 47).
Table 27:
Single-Ended Input Slew Rate Definition
Input Slew Rates
(Linear Signals)
Input
Setup
Edge
Rising
From
V
REF
Measured
To
V
IH
(
AC
) MIN
Calculation
V
IH
(
AC
) MIN - V
REF
ΔTRS
Falling
V
REF
V
IL
(
AC
) MAX
V
REF
- V
IL
(
AC
) MAX
ΔTFS
Hold
Rising
V
IL
(
DC
) MAX
V
REF
V
REF
- V
IL
(
DC
) MAX
ΔTFH
Falling
V
IH
(
DC
) MIN
V
REF
V
IH
(
DC
) MIN - V
REF
ΔTRSH
PDF: 09005aef826aa906/Source: 09005aef82a357c3
1Gb_DDR3_3.fm - Rev. D 8/1/08 EN
46
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