Ta b le 53:
Ele ct rica l Ch a ra ct e rist ics a n d AC Op e ra t in g Co n d it io n s (Sh e e t 1 o f 7)
Notes: 1–8 apply to the entire table; notes appear on page 74
DDR3-800
DDR3-1066
DDR3-1333
DDR3-1600
Pa ra m e t e r
Sym b o l
Min
Ma x
Min
Ma x
Min
Ma x
Min
Ma x
Un it s No t e s
Clo ck Tim in g
Clock period average: TC = 0°C to 85°C
tCKDLL_DIS
8
8
7,800
3,900
8
8
7,800
3,900
8
8
7,800
3,900
8
8
7,800
3,900
ns
ns
9
DLL disable mode
TC = >85°C to 95°C
t
Clock period average: DLL enable mode
High pulse width average
tCK (AVG)
tCH (AVG)
tCL (AVG)
tJITPER
See “Speed Bin Tables” on page 63 for CK range allowed
ns
10, 11
12
0.47
0.47
–100
–90
0.53
0.53
100
90
0.47
0.47
–90
0.53
0.53
90
0.47
0.47
–80
0.53
0.53
80
0.47
0.47
–70
0.53
0.53
70
CK
CK
ps
Low pulse width average
12
Clock period jitter
DLL locked
DLL locking
13
tJITPER, LCK
–80
80
–70
70
–60
60
ps
13
t
t
t
t
Clock absolute period
tCK(ABS) MIN = CK (AVG) MIN + JITPER MIN; MAX = CK (AVG) MAX + JITPER MAX
ps
Clock absolute high pulse width
tCH (ABS)
0.43
–
0.43
–
0.43
–
0.43
–
tCK
(AVG)
tCK
14
15
Clock absolute low pulse width
tCL (ABS)
0.43
–
0.43
–
0.43
–
0.43
–
(AVG)
Cycle-to-cycle jitter
DLL locked
DLL locking
2 cycles
tJITCC
tJITCC, LCK
tERR2PER
tERR3PER
tERR4PER
tERR5PER
tERR6PER
tERR7PER
tERR8PER
tERR9PER
tERR10PER
tERR11PER
tERR12PER
tERRnPER
200
180
180
160
160
140
140
120
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
16
16
17
17
17
17
17
17
17
17
17
17
17
17
Cumulative error
across
–147
–175
–194
–209
–222
–232
–241
–249
–257
–263
–269
147
175
194
209
222
232
241
249
257
263
269
–132
–157
–175
–188
–200
–209
–217
–224
–231
–237
–242
132
157
175
188
200
209
217
224
231
237
242
–118
–140
–155
–168
–177
–186
–193
–200
–205
–210
–215
118
140
155
168
177
186
193
200
205
210
215
–103
–122
–136
–147
–155
–163
–169
–175
–180
–184
–188
103
122
136
147
155
163
169
175
180
184
188
3 cycles
4 cycles
5 cycles
6 cycles
7 cycles
8 cycles
9 cycles
10 cycles
11 cycles
12 cycles
t
n = 13, 14 . . . 49, 50
cycles
tERRnPER MIN = (1 + 0.68ln[n]) × JITPER MIN
tERRnPER MAX = (1 + 0.68ln[n]) × JITPER MAX
t
MDTIC [ Micon Design Technology Corporation ]
