MDT10C55B
(4) STATUS (Status register) : R3
Bit
0
1
2
3
4
5
6
7
Symbol
C
HC
Z
PF
TF
PAGE
——
PCWUF
Carry bit
Half Carry bit
Zero bit
Power down bit
WDT Timer overflow Flag bit
ROM page select bit
Unimplemented
Pin change wake up from sleep
Function
(5) MSR (Memory Bank Select Register) : R4
b7
b6
b5
b4
b3
b2
b1
b0
Read only “1”
BANK Select
Indirect Addressing Mode
(6) PORT B : R6
PB5~PB0, I/O register, PB3 input only.
(7) PORT C: R7
PC5~PC0, I/O register.
(8) TMR (Time Mode Register)
Bit
Symbol
Function
Prescaler Value
RTCC rate
0 0 0
1:2
0 0 1
1:4
0 1 0
1:8
0 1 1
1 : 16
1 0 0
1 : 32
1 0 1
1 : 64
1 1 0
1 : 128
1 1 1
1 : 256
Prescaler assignment bit :
0: RTCC
1: Watchdog Timer
RTCC signal Edge :
0: Increment on low-to-high transition on RTCC pin
1: Increment on high-to-low transition on RTCC pin
RTCC signal set :
0: Internal instruction cycle clock
1: Transition on RTCC pin
PortB pull-high :(RB0,RB1,RB3,RB4)
0: Enable
1: Disable
WDT rate
1:1
1:2
1:4
1:8
1 : 16
1 : 32
1 : 64
1 : 128
2—0
PS2—0
3
PSC
4
TCE
5
TCS
6
PBPHB
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P. 4
2006/12
Ver. 1.0
MDTIC [ Micon Design Technology Corporation ]
