MDT10C55B
Bit
7
Symbol
PBWUB
Function
PortB wake-up : (RB0,RB1,RB3,RB4)
0: Enable
1: Disable
(9) CPIO B, CPIO C (Control Port I/O Mode Register)
The CPIO register is “write-only”
＝“0”,
I/O pin in output mode;
＝“1”,
I/O pin in input mode.
(B) Program Memory
Address
000-3FF
000
Program memory
The starting address of power on, external reset or WDT time-out reset.
Description
8. Reset Condition for all Registers
Register
CPIO B
CPIO C
TMR
IAR
RTCC
PC
STATUS
MSR
PORT B
PORT C
Address
－－
－－
－－
00h
01h
02h
03h
04h
06h
07h
Power-On Reset
--11 1111
--11 1111
1111 1111
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
110x xxxx
--xx xxxx
--xx xxxx
/MCLR Reset
--111 1111
--11 1111
1111 1111
uuuu uuuu
uuuu uuuu
0000 0000
#00# #uuu
11uu uuuu
--uu uuuu
--uu uuuu
WDT Reset
--11 1111
--11 1111
--11 1111
uuuu uuuu
uuuu uuuu
0000 0000
#00# #uuu
11uu uuuu
--uu uuuu
--uu uuuu
Note : u＝unchanged, x＝unknown, -
＝unimplemented,
read as “0”
#＝value depends on the condition of the following table
Condition
/MCLR reset (not during SLEEP)
/MCLR reset during SLEEP
WDT reset (not during SLEEP)
WDT reset during SLEEP
Wake-up from SLEEP on pin change
Status: bit 7
0
0
0
0
1
Status: bit 4
u
1
0
0
1
Status: bit 3
u
0
1
0
0
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P. 5
2006/12
Ver. 1.0
MDTIC [ Micon Design Technology Corporation ]
